init MMU on MPC55XX

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init MMU on MPC55XX

2,565件の閲覧回数
Alexander_AD
Contributor I

Hello.
I have a little problem with writing internal memory on MPC55XX,
I wrote two bootloaders, one for BAM mode, one for RAM .
for BAM the bootloader works great.
for RAM the bootloader cannot erase low Blocks,
mid and high Blocks are no problem.
I load the RAM bootloader on the CAN bus.
I tried to initialize MMU, but it doesn't lead to anything,
help please find the problem, what am I doing wrong?
maybe some other settings are needed? 

Thanks!

 

スポイラ
SSD

lowEnabledBlocks = 0x1;
midEnabledBlocks = 0x00000000;
highEnabledBlocks = 0x00000000;
returnCode = pFlashErase (&ssdConfig, shadowFlag, lowEnabledBlocks,
midEnabledBlocks, highEnabledBlocks, NULL_CALLBACK );
if ( H7F_OK != returnCode )
{
ErrorTrap(returnCode);
}

スポイラ

asm void MMU_Set_TLB1(void) {

lis r3, 0x1001
mtMAS0 r3

lis r3, 0xC000
ori r3, r3, 0x0500
mtMAS1 r3

lis r3, 0x0000
mtMAS2 r3

lis r3, 0x0000
ori r3, r3, 0x003F
mtMAS3 r3

msync
tlbwe
isync
}

 

 

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2,547件の閲覧回数
lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi Alexander,

I don't think there's problem with MMU. In case of internal boot mode or serial boot mode, the MMU is initialized by BAM in this way which should be sufficient:

lukaszadrapa_0-1623835801841.png

It would require more debugging. Did you confirm the low blocks are unlocked in both LMLR and SLMLR registers? What is the content of FLASH_MCR registers after unsuccessful erase/program operation?

Regards,

Lukas

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2,539件の閲覧回数
Alexander_AD
Contributor I

hi Lukas,
thanks for the help.
i read MMU tlb,
10000000 C0000300 00000000 0000003F
10010000 C0000300 00010000 0001000F
10020000 C0000300 00020000 0002003F
10030000 C0000300 00080000 0008003F
10040000 C0000300 00090000 0009003F
10050000 C0000300 000A0000 000A003F
10060000 C0000200 000B0000 000B003F
10070000 C0000200 000B4020 000B403F


trying to fix the first tlb,
but it doesn't help, there is still no access, maybe need some other settings to update the MMU?

asm void MMU_Set_TLB1(void) {

lis r3, 0x1001
mtMAS0 r3

lis r3, 0xC000
ori r3, r3, 0x0300
mtMAS1 r3

lis r3, 0x0001
mtMAS2 r3

lis r3, 0x0001
ori r3, r3, 0x003F
mtMAS3 r3

msync
tlbwe
isync
}

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2,522件の閲覧回数
lukaszadrapa
NXP TechSupport
NXP TechSupport

I would need more details. What I can see - first descriptor covers first 64KB of flash. It corresponds to flash blocks L0 and L1 in partition 1. It's configured as BOOK E page and it's cacheable. All accesses are permitted. What do you want to change?

By the way, this excel configurator could help you:

https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/MMU-Assist-Register-CONFIGURATOR/ta-p/1110436

Regards,

Lukas

 

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2,512件の閲覧回数
Alexander_AD
Contributor I

hi

I don't know what else can be done.
after trying to write a flash, the internal flash is not readable, is it blocked?
when trying to read flash, the processor is immediately reset.
Shadow flash is readable without problems.
maybe other settings are needed?
Thank you!

FLASH_MCR C3F88000 0B603600
FLASH_LMLR C3F88004 800CFFC0
FLASH_HLR C3F88008 8FF00000
FLASH_SLMLR C3F8800C 800CFFC0
FLASH_LMSR C3F88010 00000000
FLASH_HSR C3F88014 00000000
FLASH_AR C3F88018 0001FFF8
FLASH_BIUCR C3F8801C 00054BF1
FLASH_BIUAPR C3F88020 000000FF

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2,504件の閲覧回数
lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi,

MMU configuration seemed to be correct, so you can read the flash anytime. If not, it could be caused by ECC errors. ECC error can occur if erase operation is terminated by unexpected reset, so the flash is left in undetermined state or due to overprogramming when you program double word (64bits) which are not fully erased.

lukaszadrapa_0-1624454610811.png

You can check the content of memory in your debugger. If you see in the memory window something like "XX" or "??" then the debugger can't read the flash due to ECC errors (most likely).

The solution - erase the flash again. If you see that all the flash blocks are in erased state (0xFF) then ECC was the root cause.

Regards,

Lukas

 

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2,499件の閲覧回数
Alexander_AD
Contributor I

hi lukas!
I erased the internal flash in BAM mode, now it is readable.
yes i have ECC error 02 after FlashInit_Unlock, i do clear FLASH_MCR-EER bit.
could it be due to the eeprom in the internal flash?
I took another MPС5566, same problem, for BAM the bootloader works great.
for RAM the bootloader cannot erase low Blocks.

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2,491件の閲覧回数
lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi,

this would require more debugging, I have no idea what you do in the code. Clearing of EER is not enough, this clears the flag only. But the error is still present in the flash. If you use the flash as EEPROM, your application should be prepared for ECC errors - the exceptions should be handled appropriately. You can take a look at:

https://www.nxp.com/docs/en/application-note/AN5200.pdf

https://www.nxp.com/docs/en/application-note-software/AN5200SW.zip

Regards,

Lukas

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2,483件の閲覧回数
Alexander_AD
Contributor I

hi
Thank you.
does this line of processors have erase - protections?
maybe it was closed for writing LOW_BLOCK0

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2,477件の閲覧回数
lukaszadrapa
NXP TechSupport
NXP TechSupport

The only protection is given by LMLR and SLMLR registers.

You mentioned these values:

FLASH_LMLR C3F88004 800CFFC0
FLASH_SLMLR C3F8800C 800CFFC0

... so, the low and mid blocks are enabled for erase and write.

Regards,

Lukas

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2,472件の閲覧回数
Alexander_AD
Contributor I

I just don't understand why this code works in BAM mode, but not in RAM

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2,473件の閲覧回数
Alexander_AD
Contributor I

what can I check to find out what the problem is?
what parameter? register?

Regards

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2,441件の閲覧回数
lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi,

what can you see in the debugger? Where does it crash exactly? Which operation/command? Is an exception triggered?

Regards,

Lukas

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