Dear NXP engineers,
I got a sample code in this community which one is "Example MPC5777C-1b+2b_RAM_ECC_error_injection GHS614"
This sample code is working well in my hardware but I implemented that in my application and It was not working correctly.
( When I was executing uncorrectable error, Exception handler was asserted first and then I executed instruction step by step. Exception handler was called again, again,,, repeatedly.
It seems to be affected to AUTOSAR OS ISR wrapper. In case of sample code, there is no additional exception machine check wrapper... )
By the way, If I can make an uncorrectable ram ecc error without EIM, Please let me know.
Actually, I don't want to use EIM for making ecc error.
EIM injection must be disabled in machine check handler otherwise it affect subsequent accesses to SRAM.
/******** 1. disable EIM if error was injected ********/
EIM.EIMCR.R = 0; // global error injection
I am afraid on this device there is no other option how to inject internal SRAM ECC error.
Theoretically you could leave some portion of SRAM un-initialized and read it as ECC error, but in this case there is certain change that read random data will be “valid” as on the dump window below: