MPC5748G: How to blink LEDs from different cores?

[davidanderle]

Hello,

I'm trying to periodically blink 2 LEDs - one from the z4_0 (100ms) and one from the z2 core (2000ms). These LEDs are on PTI14 and PTI15. 

However, I find that only one of the LEDs is blinking at a time. If I pause the execution of one core, the other core's LED starts blinking and vice versa. It appears to me that there are some bus arbitration issues I'm not seeing.

I have tried using the SEMA42 driver based on the  sema_multicore_mpc5748g project, but it resulted in the same outcome and starting the codes from the debugger/standalone shows the same behaviour.

I have even written my atomic PIN toggling function here to ensure that the 2 cores are not accidentally overwriting each other's commands.

void Pin_Set(GPIO_Type *const port, const uint32_t pinIdx, const bool val){
  const uint32_t mask = 1ull << (15-pinIdx);
  const uint32_t mppdo = val ? mask : 0;
  const uint32_t portIdx = ((uint32_t)port - (uint32_t)PTA_BASE)/2;
  SIUL2->MPGPDO[portIdx] = (uint32_t)(SIUL2_MPGPDO_MASK(mask) | mppdo);
}

void Pin_Toggle(GPIO_Type *const port, const uint32_t pinIdx){
  Pin_Set(port, pinIdx, !(port->PGPDO & (1ull << (15-pinIdx))));
}

// Task called on CPU2 (z2)
void Task_Handler_z2(void){
  // Entered every 2000ms
  if(STM_DRV_GetStatusFlags(INST_STM0, 1)) {
    STM_DRV_ClearStatusFlags(INST_STM0, 1);
    STM_DRV_SetStartValueCount(INST_STM0, 0);

    SEMA42_DRV_LockGate(0, 0);
    if(SEMA42_DRV_GetGateLocker(0, 0) == (GET_CORE_ID() + 1)){
      Pin_Toggle(PTI, 14);
      SEMA42_DRV_UnlockGate(0, 0);
    }
  }
}

// Task called on CPU0 (z4_0)
void Task_Handler_z4_0(void){
  // Entered every 100ms
  if(STM_DRV_GetStatusFlags(INST_STM0, 0)) {
    STM_DRV_ClearStatusFlags(INST_STM0, 0);
    STM_DRV_SetStartValueCount(INST_STM0, 0);

    SEMA42_DRV_LockGate(0, 0);
    if(SEMA42_DRV_GetGateLocker(0, 0) == (GET_CORE_ID() + 1)){
      Pin_Toggle(PTI, 15);
      SEMA42_DRV_UnlockGate(0, 0);
    }
  }
}

void main_z4_0(void){
  // ... Init hardware and stuff
  for(;;){
    Task_Handler_z4_0();
  }
}
void main_z2(void){
  for(;;){
    Task_Handler_z2();
  }
}

Has anybody got any suggestions what's wrong with my setup?

Thanks in advance!

[davidanderle]

It turns out I was using the same STM module and was resetting the counter on both CPUs. Using STM0 on CPU0 and STM2 on CPU2 has resolved this issue. But I did look into the cross bar settings and may be useful knowledge in the future.

[davidtosenovjan]

It could be caused by XBAR priority arbitration. You could to try to configure XBAR to set round robin for all slaves for both cores.