MPC5746C FCCU NCF[0] Flash Reset Error

[shijie_zheng]

The description of NCF[0] in the manual is“Flash reset error:
Sideband signal from flash to indicate that flash encountered faults during its reset reads.
This is caused by ECC double bit detection as well as the coherency checks done on the test
row reads”

Based on this description, I can't determine if this error only occurs on CPU reset? or, it can be generated when accessing flash，because ECC errors can occur at any time flash is accessed.

Can anyone help explain this description?

Thank you .

[petervlna]

Hello,

Based on this description, I can't determine if this error only occurs on CPU reset?

Yes, this error is triggered when there is a fault during flash initialization/test in reset phase 2.

or it can be generated when accessing flash，because ECC errors can occur at any time flash is accessed.

ECC errors during the device operation out of reset are reported in NCF[22] NCF[23].

regards,

Peter

[shijie_zheng]

Dear Peter，Thank you for your help，your explanation is very helpful。