MPC5644A system clock configure process

[jinshuaixu]

Hello

Now ,l meet a question , MPC5644A chip clock configure way l learned it from my colleague,l find that if  want to configure MPC5644A system as 80M,must first configure it as 40M,l want to know whether this process is rational?

if l configure system clock as 80M directly not configure it as 40M first, whether is there any problem?

Below is MPC5644A chip system clock configure process 

void sysclk_init_fnc(void)
{
/*-----------------------Disable clock Monitoring flags---------------*/

FMPLL.ESYNCR2.R = 0x00000000;
/* Ensure loss of lock reset is disabled*/
/* Ensure loss of clock reset is disabled*/
/* Ensure Loss of lock IRQ is disabled*/

/*---------------------------------------------------------------------*/
/* System Clock Setup */
/*---------------------------------------------------------------------*/

/*--------------Clock Configuration Mode-------------------------------*/

FMPLL.ESYNCR1.B.EMODE = 0x0;
/* The Clock Configuration Mode : Legacy Mode */
FMPLL.ESYNCR1.B.CLKCFG = 0x07;
/* Clock Mode :Normal w/ Crystal Ref */

/*--------------------------------------------------------------------*/
/* PLL Ramping */
/*--------------------------------------------------------------------*/

/*------------------------- Stage 1-----------------------------------*/

FMPLL.SYNCR.B.RFD = 0x2;
/* PLL Ramping Step 1 Divider : 4 */
FMPLL.SYNCR.B.PREDIV = 0x00;
/* Pre-Divider Selected :1 */
FMPLL.SYNCR.B.MFD = 0x6;
/* PLL Ramping Step 1 Multiplier: 10 */
while (0 == FMPLL.SYNSR.B.LOCK){};
/* Wait for FMPLL to acquire lock */
FMPLL.SYNSR.B.LOLF = 0x1;
/* Clear the Loss-of-Lock Flag */

/*------------------------- Stage 2-----------------------------------*/

FMPLL.SYNCR.B.RFD = 0x2;
/* PLL Ramping Step 2 Divider : 4 */
FMPLL.SYNCR.B.PREDIV = 0x00;
/* Pre-Divider Selected :1 */
FMPLL.SYNCR.B.MFD = 0x10;
/* PLL Ramping Step 2 Multiplier: 20 */
while (0 == FMPLL.SYNSR.B.LOCK){};
/* Wait for FMPLL to acquire lock */
FMPLL.SYNSR.B.LOLF = 0x1;
/* Clear the Loss-of-Lock Flag */

/*--------------------------------------------------------------------*/
/* FMPLL Setup */
/*--------------------------------------------------------------------*/
FMPLL.SYNFMMR.R = 0x00000000;
/* Frequency Modulation : Disabled */
/* Spread Type Select: Center Spread */
/* Modulation Period: 0*/
/* Modulation Increment Step : 0*/
while(1 == FMPLL.SYNFMMR.B.BSY){};
/* Wait for the FMPLL processing to complete */

/*---------- System Clock Divider Setup ------------------------------*/

SIU.SYSDIV.R = 0x00000010;
/* FlexCAN Clock Divider: 1*/
/* The System Clock Divider Bypass: Enabled */
/* The System Clock Divider: 1*/

/*--------------------------------------------------------------------*/
/* Clock Monitoring Flags */
/*--------------------------------------------------------------------*/

FMPLL.ESYNCR2.R = 0x00000003;
/* The Loss-of-Clock function :Disabled */
/* Reset on Loss-of-lock : Disabled */
/* Reset on Loss-of-clock : Disabled */
/* Loss-of-Lock Interrupt Request : Disabled */
/* Loss-of-Clock Interrupt Request: Disabled */
}

[petervlna · Accepted solution]

Hello,

if want to configure MPC5644A system as 80M,must first configure it as 40M,l want to know whether this process is rational?

As far as I know you can directly set 80MHz on our EVB. In case of weak power supply there can be issue when you set directly 80MHz out of 16MHz IRC as the power supply could not be able deliver such current in such short time.

But this is only in case you do not follow the Datasheet specs.

Feel free to look at our example SW:

https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/MPC5-software-example-list/ta-p/1102445#MPC5644A

Best regards,

Peter