I get a problem[MPC5748g]:" Program received signal SIGTRAP, Trace/breakpoint trap."

[wangtezi]

I also encountered the "Program received signal SIGTRAP, Trace/breakpoint trap." problem. However, the chip I use is MPC5748g, and the version of S32 is Version: 2017.R1。

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monitor preserve1 0
load I:\\tmp\\workspaceS32DS.Power.2017.R1/emios/emios_Z4_2/Debug/emios_Z4_2.elf
Loading section .startup, size 0x246 lma 0x11d0000
Loading section .core_exceptions_table, size 0xf4 lma 0x11d1000
Loading section .intc_vector_table, size 0xbc8 lma 0x11d2000
Loading section .text, size 0x1e0 lma 0x11d2bd0
Loading section .data, size 0x4 lma 0x11d2db0
Loading section .got2, size 0x1c lma 0x11d2db4
Start address 0x11d0000, load size 4354
Transfer rate: 157 KB/sec, 544 bytes/write.
load I:\\tmp\\workspaceS32DS.Power.2017.R1/emios/emios_Z2_3/Debug/emios_Z2_3.elf
Loading section .startup, size 0x1b6 lma 0x13a0000
Loading section .core_exceptions_table, size 0xf4 lma 0x13a1000
Loading section .intc_vector_table, size 0xbc8 lma 0x13a2000
Loading section .text, size 0x1c0 lma 0x13a2bd0
Loading section .data, size 0x4 lma 0x13a2d90
Loading section .got2, size 0x1c lma 0x13a2d94
Start address 0x13a0000, load size 4178
Transfer rate: 151 KB/sec, 522 bytes/write.
load I:\\tmp\\workspaceS32DS.Power.2017.R1\\emios\\emios_Z4_1\\Debug\\emios_Z4_1.elf
Loading section .rchw, size 0x4 lma 0xfa0000
Loading section .cpu2_reset_vector, size 0x4 lma 0xfa0004
Loading section .cpu0_reset_vector, size 0x4 lma 0xfa0010
Loading section .cpu1_reset_vector, size 0x4 lma 0xfa0014
Loading section .startup, size 0x26e lma 0x1000000
Loading section .core_exceptions_table, size 0xf4 lma 0x1001000
Loading section .intc_vector_table, size 0xbc8 lma 0x1002000
Loading section .text, size 0x8d0 lma 0x1002bd0
Loading section .data, size 0x4 lma 0x10034a0
Loading section .got2, size 0x1c lma 0x10034a4
Start address 0x1000000, load size 6186
Transfer rate: 134 KB/sec, 441 bytes/write.
monitor endmultiload
Ignoring packet error, continuing...
Ignoring packet error, continuing...
monitor selectcore 0
Warning: the current language does not match this frame.
No source file named I:\\tmp\\workspaceS32DS.Power.2017.R1\\adc\\adc_Z4_1\\src\\adc_Z4_1.c.
continue
Continuing.
Note: automatically using hardware breakpoints for read-only addresses.

Temporary breakpoint 2, main () at ../src/emios_Z4_1.c:70
70 {
set architecture powerpc:vle
The target architecture is assumed to be powerpc:vle

Program received signal SIGTRAP, Trace/breakpoint trap.
PLL_160MHz () at ../src/mode.c:27
27 {

I see that others have solved by replacing the new link file sent by Jiri Kral. Do I have to update the link file as well?