FlexRay : MBIF flag is not clear

Showing results for 
Show  only  | Search instead for 
Did you mean: 

FlexRay : MBIF flag is not clear

Contributor IV


I am using DEVKIT MPC5748G development Board for FlexRay driver development and IDE is S32 DS for power architecture V2.1.



Node 1 : Transmitter

Node 2 : Receiver (Just for testing in future it may transmit data ).



The MBIF flag is not cleared even after writing 1 to FR_MBCCSR[MBIF] register bit.



The Node 1 Transmits frame and Node will receive frames. As the Node 2 is not transmitting any frames even though Node 1 is receiving frames (may be NULL Frame) due to that MBIF flag is set to 1. But this flag is not getting clear even after writing 1 to FR_MBCCSR[MBIF] register bit. I configured receive interrupt to be asserted as soon as data is received from frames and read the data from message buffer. So RBIF is set to 1 because of MBIF is cleared. Due to this Rx interrupt routine is executing.


My observation is when FR_MBCCSR[DUP] = 0 then MBIF interrupt flag is not getting cleared.


But when FR_MBCCSR[DUP] = 1 then MBIF flag is getting cleared.


Here I have attached image files for your reference which shows the status of register bits.


Please let me know your suggestion to clear MBIF flag or how to handle such scenarios.

Labels (1)
0 Kudos
1 Reply

NXP TechSupport
NXP TechSupport



The MBIF flag is clearable when the DUP is set because in this case the application lock the MB for itself compare to the situation when the DUP is cleared where the application doesn’t lock the MB for itself.

You see MBIF set in the multiple receive MBs or only in the one related to configured key slot?

Do you have configured the transmit MB for the same key slot on Node2 which is used for startup and synchronization?


BR, Petr

0 Kudos