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* Detailed Description:
* This example content a basic PMPLL initialization and
* configuration of Mode Entry module and Clock Generation
* module. By default active is core 2 -> e200z4
* Configure PIT timer to trigger interrupt and service it
* ------------------------------------------------------------------------------
* Test HW: MPC57xx
* Maskset: 0N76P
* Target : internal_FLASH
* Fsys: 265 MHz PLL with 40 MHz crystal reference
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Revision History:
1.0 Sep-07-2017 b21190(Vlna Peter) Initial Version
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