GPIO interrupt of RT1060

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GPIO interrupt of RT1060

360 Views
vikingyuan
Contributor II

Hi,

I'm testing the GPIO interrupts with 2 pins of J23 on the MIMXRT1060-EVK board:

pin3(GPIO_AD_B1_04/GPIO1_IO20)  and pin4 pin (GPIO_AD_B1_05/GPIO1_IO21)

GPIO_AD_B1_04(GPIO1_IO20) is set as an interrupt pin, GPIO_AD_B1_05(GPIO1_IO21) is set as a general GPIO input pin.

gpio_pin_config_t sw_config = {

          kGPIO_DigitalInput,

          0,

         kGPIO_IntFallingEdge,

};

     EnableIRQ(GPIO1_Combined_16_31_IRQn);

     GPIO_PinInit(GPIO1, 20, &sw_config);

     GPIO_PortEnableInterrupts(GPIO1, 1U << 20);

 

     Interrupt_Handler()

{

     GPIO_GetPinsInterruptFlags(GPIO1);

     GPIO_PortClearInterruptFlags(GPIO1, 1U << 20);

     SDK_ISR_EXIT_BARRIER;

}

I check the interrupt flags by calling GPIO_GetPinsInterruptFlags(GPIO1) in the ISR handler. Only bit 20 (e.g. 0xff133ff0)should be set when getting the interrupt flag. However, sometimes bit 21(e.g. 0xff333ff0) is also set. Is it expected?

The signal sequence is like below, yellow signal is GPIO1_IO20, blue signal is GPIO1_IO21.

gpio_interrupt_20211129a.bmp

 

 

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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi,
Thanks for your reply.
Can you explain the below sentence, as I'm a bit confused?

"but still the interrupt mask of GPIO1_IO21 is set after inputing the signal sequence as above a few times. "
Have a great day,
TIC

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342 Views
vikingyuan
Contributor II

Hi,

  Sorry, which sentence is unclear?

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349 Views
jeremyzhou
NXP TechSupport
NXP TechSupport

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
I don't think we can jump to the conclusion that the GPIO1_IO21 triggers an interrupt.
The bit in ISR can be 1, it won't trigger an interrupt if the corresponding bit is 0 in the IMR register, just as the figure shows.

jeremyzhou_0-1638342476760.png


Have a great day,
TIC

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vikingyuan
Contributor II

I've checked the setting of IMR, and confirmed only GPIO1_IO20 is set (value 0x0x00100000). I also tried to disable the IMR of GPIO1_21 everytime when receiving the interrupt in the ISR handler, but still the interrupt mask of GPIO1_IO21 is set after inputing the signal sequence as above a few times. 

It doesn't happen every time, but happens after a few tests.

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