MX8QM CM4_0 interrupt handler on LSIO_GPIO3 not working

[zachkozar]

I'm trying to get an interrupt handler to trigger on the rising edge of a 1PPS signal connected to GPIO3_IO05, to then toggle GPIO3_IO03 so that I can measure interrupt latency. I've based my project off of the gpio led_output example. I've read through the documentation and processor manual and know that to do this i'll need to use IRQSTEER so that the external gpio interrupt is routed to the CM4_0 core. However, I cannot get this to work. I've double checked my connections. I've attached the code i've tried, my modifications were in the main source file and pin_mux. Any help is appreciated!

[Dhruvit]

Hi @zachkozar,

I hope you are doing well.

Please find below points and suggestions.

1)Please make sure that the interrupt handler is registered correctly.

2)Could you confirm that the particular GPIO is not used anywhere else?

3)As per Table 3-1. IRQ_STEER Channel Mapping(in Reference Manual IMX8QMRM Rev. 0, 9/2021) channel 1 should be used for CM4_0 core.

Kindly route the interrupt on IRQSTEER channel 1 in the main function as given below and try.

- NVIC_EnableIRQ(IRQSTEER_2_IRQn);

+ NVIC_EnableIRQ(IRQSTEER_1_IRQn);

Thanks & Regards,

Dhruvit Vasavada.

[zachkozar]

Hi Dhruvit,

Thank you for your reply!

1. I believe i'm registering the handler correctly. According to the other examples using interrupts, you only need to declare a function that matches the name and signature in the startup_MIMX8QM6_cm4_core0.S file included with the SDK, and then enable it in the NVIC. According to the SDK source, the IRQSTEER_Init function enables all 8 IRQSTEER master interrupts, so my EnableIRQ call is technically unnecessary.

2. The LSIO_GPIO3 peripheral is not being used anywhere else. It is disabled in the linux device tree and the CM4_1 core is offline.

3. I tried this with no success. I didn't think it would though, according to the SDK the IRQSTEER_N_IRQn interrupt enums are for the eight IRQSTEER master interrupts under the CM4_0s IRQSTEER channel.

Could you confirm if my understanding is correct on #1 and #3? Is there anything else I could be missing here?

Thanks again.

[Dhruvit]

Hi @zachkozar,

I hope you are doing well.

Your interrupt registration seems correct.

IRQSTEER_2_IRQ channel is correct for LSIO_GPIO3.

It can be calculated using the below macro.

#define GET_IRQSTEER_MASTER_IRQn(IRQn)  (IRQn_Type)(IRQSTEER_0_IRQn + (IRQn - FSL_FEATURE_IRQSTEER_IRQ_START_INDEX) / 64U)

One can refer to SDK_2_9_0_MEK-MIMX8QM/devices/MIMX8QM6/drivers/fsl_gpio.h and SDK_2_9_0_MEK-MIMX8QM/devices/MIMX8QM6/drivers/fsl_gpio.c in SDK for various GPIO interrupt configuration and enabling.

Like GPIO_PinSetInterruptConfig , GPIO_EnableInterrupts, etc...

Please refer to /SDK_2_9_0_MEK-MIMX8QM/boards/mekmimx8qm/demo_apps/power_mode_switch/cm4_core/lpm.c where interrupt registration is done.

Please make sure that LSIO_GPIO3 module and pads are assigned to the M4 core partition.

Please refer to System Controller Firmware 101 - Resource management service

Thanks & Regards,
Dhruvit Vasavada