how to config xfi in uboot

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how to config xfi in uboot

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__OTL__
Contributor III

I am working on our customized ls1046a board.

The Serdes1 lane 1 is configured as XFI and connected to a switch chip (which support xfi connection)

How to configure u-boot to enable the XFI network without a phy?

 

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__OTL__
Contributor III

Finally after checking all the registers of DPAA we found a local fault event flag, which means the opposite side of the xfi port is not sending any signal.

Then we checked the switch chip and found a setting mistake.

Now the xfi is working good.

 

So in conclusion to my question, it seems no need to do anything other than writting the DPAA Firmware.

 

Thanks you so much! @khushbur 

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khushbur
NXP TechSupport
NXP TechSupport

Hi @__OTL__ 

From the boot logs i can see "Fman1: Data at 00000000fbc47e40 is not a firmware"

Can you please update DPAA1 FMan microcode (ucode) image in QSPI NOR flash. Please refer below link for procedure 

https://community.nxp.com/t5/Layerscape-Knowledge-Base/LS1046ARDB-How-to-update-DPAA1-FMan-microcode...

 

Thanks

Khushbu

 

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__OTL__
Contributor III

Hi @khushbur 

Thank you!

I wrote the FMAN FW and got some progress.

The XFI seems to try to transfer data now.

But this time I got another error :

=> setenv ethact FM1@TGEC1
=> setenv eth5addr 00:11:22:33:44:66
=> setenv ipaddr 192.168.0.50
=> setenv netmask 255.255.255.0
=> setenv gatewayip 192.168.0.21
=> ping 192.168.0.21
Using FM1@TGEC1 device
FM1@TGEC1: Tx buffer not ready, txbd->status = 0x8800
FM1@TGEC1: Tx buffer not ready, txbd->status = 0x8800
FM1@TGEC1: Tx buffer not ready, txbd->status = 0x8800
FM1@TGEC1: Tx buffer not ready, txbd->status = 0x8800

 

Refer to this thread : Tx error, txbd->status = 0x8800 - NXP Community

I checked RCW, DEVDISR and clock for XFI.

The RCW for SerDes1 is 0x1040 and I am using lane 0 as XFI. ← seems good

DEVDISR is all 0, no one is disabled. ← seems good

Clock for XFI is 156.25MHz and is inputted to SD1_REF_CLK2.

Clock related rcw is as below:

SRDS_PLL1_REF_CLK_SEL_S1 = 0b11   (higher freq for both PLL1 and PLL2)
SRDS_PLL_PD_S1 = 0b00  (both PLL1 and PLL2 are not powered down)
SRDS_REFCLK_SEL_S1 = 0b0  (SD1_REF_CLK seperate reference clocks to both PLLs of SerDes 1)

 

 

Is there anything wrong?

Or any other thing to check?

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__OTL__
Contributor III

Finally after checking all the registers of DPAA we found a local fault event flag, which means the opposite side of the xfi port is not sending any signal.

Then we checked the switch chip and found a setting mistake.

Now the xfi is working good.

 

So in conclusion to my question, it seems no need to do anything other than writting the DPAA Firmware.

 

Thanks you so much! @khushbur 

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khushbur
NXP TechSupport
NXP TechSupport

Hi @__OTL__ 

Would you please provide uboot/board/freescale/custom_board/eth.c  and full boot logs?

Thanks

Khushbu

 

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__OTL__
Contributor III

Hi @khushbur 

Here's my eth.c and bootlog. 

I am refering to the ls1046ardb's eth.c.

But cause we don't use mdio, I am sure this will not work...

 

Thanks.

Yu

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__OTL__
Contributor III

hi @khushbur 

how about this? please help me.

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__OTL__
Contributor III

hi @khushbur 

SerDes 1 is configured as 0x1040 use XFI.9 on lane0.

XFI.9 is connected to switch 88E6393X's 10G SerDes port.

Yes, it is MAC to MAC connection.

 

I want to know how to modify eth.c to set up this MAC to MAC connection.

"No ethernet found" is presented in the uboot log now.

I don't know if this log is caused by our switch setting or wrong config of LS1046A

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khushbur
NXP TechSupport
NXP TechSupport

Hi @__OTL__ 

 

Can you please brief us about your set up?

is it MAC to MAC connection?

 

Thanks

Khushbu

 

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3,277 Views
__OTL__
Contributor III

Please help me with this.

The switch is configured by other chips.

We don't use any MDIO on this system.

How do I modify eth.c ?

In uboot log we see  "no ethernet" now.

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