Reset Scheme LS1012A

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Reset Scheme LS1012A

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g_reshmi
Contributor II

Hi Team,

I have designed a board based on LS1012A processor. I have decided to drop the K20 microcontroller (USB to JTAG Bridge) and access the processor directly through JTAG interface. 

We need clarification on following:

1. There are two resets for LS1012A, One for Microprocessor ("POR") and other reset "TRST" for JTAG Interface (TAP Controller).

2. For "POR" there are three resets used:

     a. Power Good Signal from PMIC

     b. Reset from JTAG Connector

     c. Reset Request from LS1012A itself.

3. For "TRST", we are considering below:

     a. Power Good Signal from PMIC only

Query: Do we also consider the Reset from the JTAG Header for "TRST" of LS1012A.

 

Kindly provide the reset scheme for LS1012A in case we only need to debug through JTAG.

Reference Board referred: "XFRWY-LS1012A-PA Rev - B"

Regards,

Reshmi

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ufedor
NXP TechSupport
NXP TechSupport

> Do we also consider the Reset from the JTAG Header for "TRST" of LS1012A?

No.

Refer to the AN5192 - QorIQ LS1012A Design Checklist, Figure 17. JTAG interface connection.

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