How to establish 2.5G SGMII on LS1088ARDB

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

How to establish 2.5G SGMII on LS1088ARDB

1,646 Views
tzongruey
Contributor I

Hi,

The Serdes protocol number we used on our LS1088ARDB board is 56
Our purpose is to establish an external 2.5G SGMII interface on mac1 and mac2
Therefore, the modifications we made to the following source code


u-boot/arch/arm/cpu/armv8/fsl-layerscape/ls1088a_serdes.c

static struct serdes_config serdes1_cfg_tbl[] = {
/* SerDes 1 */
.....
/* New add protocol number 56 57 */
{0x38, {SGMII3, PCIE1, SGMII1, SGMII2 }, {3, 5, 2, 2 } },
{0x39, {SGMII3, PCIE1, SGMII1, QSGMII_B }, {3, 5, 3, 4 } },
....
{}
};

u-boot/board/freescale/ls1088a/eth_ls1088ardb.c

int board_eth_init(bd_t *bis)
{

......

for (i = WRIOP1_DPMAC3; i <= WRIOP1_DPMAC10; i++) {
interface = wriop_get_enet_if(i);
switch (interface) {
case PHY_INTERFACE_MODE_QSGMII:
dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME);
wriop_set_mdio(i, dev);
break;
default:
break;
}
}
wriop_set_phy_address(WRIOP1_DPMAC2, 0, AQ_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC1, 0, AQ_PHY_ADDR2);
dev = miiphy_get_dev_by_name(DEFAULT_WRIOP_MDIO1_NAME);
wriop_set_mdio(WRIOP1_DPMAC2, dev);
wriop_set_mdio(WRIOP1_DPMAC1, dev);

......

return pci_eth_init(bis);
}

rcw/ls1088ardb/FCQQQQQQQQ_PPP_H_0x1d_0x0d/rcw_1600_qspi.rcw
/* Set RCW Serdes Protocol number as 56 */
.....
SRDS_PRTCL_S1_LN0=2
SRDS_PRTCL_S1_LN1=2
SRDS_PRTCL_S1_LN2=5
SRDS_PRTCL_S1_LN3=3
SRDS_PRTCL_S2_LN0=0
SRDS_PRTCL_S2_LN1=0
SRDS_PRTCL_S2_LN2=0
SRDS_PRTCL_S2_LN3=0
SRDS_PLL_PD_PLL2=1
SRDS_PLL_PD_PLL3=1
SRDS_PLL_PD_PLL4=1
SRDS_PLL_REF_CLK_SEL_S2=1
.....


flexbuild_lsdk2004_update_290520/configs/board/ls1088ardb/manifest
/* Modify dpaa2 mc dpc source file */
# [general]
machine=ls1088ardb

# [firmware_images]
rcw_qspi=$FBOUTDIR/firmware/rcw/ls1088ardb/FCQQQQQQQQ_PPP_H_0x1d_0x0d/rcw_1600_qspi.bin
rcw_sd=$FBOUTDIR/firmware/rcw/ls1088ardb/FCQQQQQQQQ_PPP_H_0x1d_0x0d/rcw_1600_sd.bin
rcw_emmc=$FBOUTDIR/firmware/rcw/ls1088ardb/FCQQQQQQQQ_PPP_H_0x1d_0x0d/rcw_1600_emmc.bin
......
#dpaa2_mc_dpc=$FBOUTDIR/firmware/mc_utils/config/ls1088a/RDB/custom/dpc-bman-4M.0x1D-0x0D.dtb
dpaa2_mc_dpc=$FBOUTDIR/firmware/mc_utils/config/ls1088a/RDB/dpc.0x1D-0x0D.dtb
dpaa2_mc_dpl=$FBOUTDIR/firmware/mc_utils/config/ls1088a/RDB/dpl-eth.0x1D_0x0D.dtb
......


mc_utils/config/ls1088a/RDB/dpc.0x1D-0x0D.dts
/* add mac1 and mac2 mac3 to board info */
board_info {
ports {
/* All ports have by default FIXED_LINK PHYs.
* Add "MAC_LINK_TYPE_PHY" properties for ports
* that have managed PHYs
*/

mac@1 {
link_type = "MAC_LINK_TYPE_FIXED";
enet_if = "SGMII";
pcs_autoneg = "off";
max_rate = <2500>;
};
mac@2 {
link_type = "MAC_LINK_TYPE_FIXED";
enet_if = "SGMII";
pcs_autoneg = "off";
max_rate = <2500>;
};
mac@3 {
link_type = "MAC_LINK_TYPE_FIXED";
enet_if = "SGMII";
pcs_autoneg = "off";
max_rate = <1000>;
};
};
};

 

And we also modified the Linux kernel device tree as following

Linux kernel fsl-ls 1088a-rdb.dts

.....
&emdio1 {

mdio1_phy1: emdio1_phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
interrupts = <0 2 0x4>;
reg = <0x1c>;
phy-connection-type = "sgmii-2500";
};

/* map dpmac.2 for aqr mdio - */
mdio1_phy2: emdio1_phy@2 {
compatible = "ethernet-phy-ieee802.3-c45";
interrupts = <0 2 0x4>;
reg= <0x1d>;
phy-connection-type = "sgmii-2500";
};

mdio1_phy3: emdio1_phy@3 {
compatible = "ethernet-phy-ieee802.3-c45";
interrupts = <0 2 0x4>;
reg= <0x1e>;
phy-connection-type = "sgmii";
};

mdio1_phy4: emdio1_phy@4 {
compatible = "ethernet-phy-ieee802.3-c45";
interrupfs = <0 2 0x4>;
reg= <0x1f>;
phy-connection-type = "sgmii";
};
mdio1_phy5: emdio1_phy@5 {
compatible = "ethernet-phy-ieee802.3-c45";
interrupfs = <0 2 0x4>;
reg= <0x0c>;
phy-connection-type = "sgmii";
};

 

};

&emdio2 {
/* Aquantia AQR105 10G PHY */
mdio2_phy1: emdio2_phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
interrupts = <0 2 0x4>;
reg = <0x0>;
phy-connection-type = "sgmii-2500";
};
mdio2_phy2: emdio2_phy@2 {
compatible = "ethernet-phy-ieee802.3-c45";
interrupts = <0 2 0x4>;
reg = <0x1>;
phy-connection-type = "sgmii-2500";
};
};

/* DPMAC connections to external PHYs
* based on LS1088A RM RevC - $24.1.2 SerDes Options
*/
/* DPMAC1 is 10G SFP+, fixed link */


&dpmac1 {
fixed-link = <0 1 2500 0 0>;
phy-connection-type = "sgmii-2500";
phy-handle = <&mdio1_phy1>;
};

&dpmac2 {
fixed-link = <0 1 2500 0 0>;
phy-connection-type = "sgmii-2500";
phy-handle = <&mdio1_phy2>;
};

&dpmac3 {
fixed-link = <0 1 1000 0 0>;
phy-connection-type = "sgmii";
phy-handle = <&mdio1_phy5>;
};

But it couldn't ping out successfully.
We also ask the hardware team members to measure the mac1 and mac2 signals.
It seems the signal didn't correct.
Therefore, I would like to ask if there is any code that I forgot to change.

Thanks

0 Kudos
Reply
4 Replies

1,608 Views
yipingwang
NXP TechSupport
NXP TechSupport

In u-boot source code, how do you define AQ_PHY_ADDR1 and AQ_PHY_ADDR2?

In u-boot, can you ping server successfully with DPMAC1 and DPMAC2?

In Linux dts file, please delete "fixed-link" definition, "fixed-link" is used for PHY less Ethernet port definition.

&dpmac1 {
fixed-link = <0 1 2500 0 0>;
phy-connection-type = "sgmii-2500";
phy-handle = <&mdio1_phy1>;
};

&dpmac2 {
fixed-link = <0 1 2500 0 0>;
phy-connection-type = "sgmii-2500";
phy-handle = <&mdio1_phy2>;
};

0 Kudos
Reply

1,585 Views
tzongruey
Contributor I

Hi,

Here is some additional information.

Our LS1088ARDB is connecting mac1 to Microchip VSC7514 ethernet switch IC and connecting mac2 to the SGMII interface of an LS1046ARDB board.

Therefore, we set the fixed-linked in the Linux dpmac device tree.

Because we actually used for PHY less Ethernet port definition.

I wonder to know how to debug the mac2 2.5G SGMII interface which is connected to a 2.5G SGMII interface of an LS1046ARDB.

The LS1088ARDB mac3 is a 1G SGMII interface connected to Microchip VSC7514 ethernet switch IC and it can ping out with mac3.

The mac1 is a 2.5G SGMII interface also connected to a Microchip VSC7514 ethernet switch IC but it couldn't ping out with mac1.

Thanks

 

0 Kudos
Reply

1,556 Views
yipingwang
NXP TechSupport
NXP TechSupport

If MAC1 and MAC2 are PHY-less Ethernet ports, please remove the following in board_eth_init function in u-boot source.

wriop_set_phy_address(WRIOP1_DPMAC2, 0, AQ_PHY_ADDR1);
wriop_set_phy_address(WRIOP1_DPMAC1, 0, AQ_PHY_ADDR2);

In Linux dts definition, please remove "phy-handle" property in dpmac1 and dpmac2 device nodes definition.

&dpmac1 {
fixed-link = <0 1 2500 0 0>;
phy-connection-type = "sgmii-2500";
phy-handle = <&mdio1_phy1>;
};

&dpmac2 {
fixed-link = <0 1 2500 0 0>;
phy-connection-type = "sgmii-2500";
phy-handle = <&mdio1_phy2>;
};

For vsc7514-switch definition in dts, please refer to the example in Documentation/devicetree/bindings/net/mscc-ocelot.txt in Linux Kernel source code.

0 Kudos
Reply

1,599 Views
tzongruey
Contributor I

In the u-boot source code, how do you define AQ_PHY_ADDR1 and AQ_PHY_ADDR2?
Ans:
I defined AQ_PHY_ADDR1 as 0 and AQ_PHY_ADDR2 as 1 in u-boot/include/configs/ls1088ardb.h

In u-boot, can you ping the server successfully with DPMAC1 and DPMAC2?
Ans:
No, I couldn't ping out with DPMAC1 and DPMAC2.
But I could ping out with DPMAC3

The attached file is the bootup log of my board.

Thanks

0 Kudos
Reply