LPC1000 and PWM audio not possible?

lpcware · ‎06-15-2016

Content originally posted in LPCWare by madid87 on Wed Aug 01 08:22:35 MST 2012
Hello everyone.

I'm trying to play 8-bit uncompressed .wav music via PWM on LPC1114.
The problem I have is that PWM match registers are not double buffered. Because of it there are glitches present in the PWM output when duty-cycle is varied.

E.Q.
- PWM period is set via MR3=255.
- current duty cycle is set to, i.e. MR0=190;
- new duty cycle should be 90, i.e. MR0=90.

If the timer is somewhere between these values (new and old duty cycle) when the new duty cycle is written the output will never go high because no match will occur in that PWM period. This causes huge distortion in my audio signal.

I'm sure some of you are familiar with this problem. Is there a easy work-around? I have tried to determine the safe time window for writing the new value but it looks very difficult because PWM clock frequency is running at maximum 48MHz and the CPU cannot keep track of the current timer value accurately enough.

Thank you.

lpcware · ‎06-15-2016

Content originally posted in LPCWare by fjrg76 on Tue Sep 18 18:41:19 MST 2012

Quote: madid87
Hello everyone.

I'm trying to play 8-bit uncompressed .wav music via PWM on LPC1114.
The problem I have is that PWM match registers are not double buffered. Because of it there are glitches present in the PWM output when duty-cycle is varied.

E.Q.
- PWM period is set via MR3=255.
- current duty cycle is set to, i.e. MR0=190;
- new duty cycle should be 90, i.e. MR0=90.

If the timer is somewhere between these values (new and old duty cycle) when the new duty cycle is written the output will never go high because no match will occur in that PWM period. This causes huge distortion in my audio signal.

I'm sure some of you are familiar with this problem. Is there a easy work-around? I have tried to determine the safe time window for writing the new value but it looks very difficult because PWM clock frequency is running at maximum 48MHz and the CPU cannot keep track of the current timer value accurately enough.

Thank you.

You should enable an interrupt on MR3 just before any attempt to modify the MR0's value, so this change is in synchrony. When the interrupt triggers, then you change the value in MR0 inside the ISR, and finally disable the interrupt.

pwm_NewDutyVal(newVal)
{
duty=newVal;
enable_InterruptOnMR3();
}
...
ISR_MR3()
{
MR0=duty;
disable_InterruptOnMR3();
}