Content originally posted in LPCWare by MarcVonWindscooting on Wed Nov 12 16:33:03 MST 2014
What's your aim?
1) Being able to measure us or sub-us delays? That enables you to create delays in that range easily, too. For this, I would use one SCT with 32bit counter, just free running. Reading out the timer value is simply looking at the clock (of PCLKs). Use 32bit math and you're fine.
2) If you want exactly 1us per tick (in some special register, NOT one or even multiple variables in RAM incremented) I would try to use one SCT split into 2 16-bit counters and use one part as a pre-scaler and the other as the clock counter. Use 16bit math here and you're fine.
A very special case of course could be a clock of 1 < < n MHz, using approach 1) but dividing by > > n and applying special overflow handling when calculating differences t1-t0 .
Just theory, I find myself doing timings with MRT and SYSTICK instead of the simple approach with T0.TC+T0.PR on the 'old' uCs. ARM had better includes a prescaler into SYSTICK, really. Saved a few gates at the expense of umpteen words of code :~
EDIT: forget about 2) !
There [color=#f00]is[/color] a pre-scaler in the SCT and it provides enough range (1..256) to scale to 1 MHz (1us). I'm working on something very similar for a LPC810 right now.