LPC11U68 User Manual says: "IAP commands, which result in a flash write/erase operation, use 32 bytes of space in the top portion of the on-chip RAM for execution. The user program should not use this space if IAP flash programming is permitted in the application."
There are three areas of RAM on this chip. I am assuming that they are talking about SRAM0 (correct?)
The Linker Script for the LPCXpresso IAP/Flash example "periph_flashiap_flashsig_Debug.ld" places the stack at the very top of SRAM0 (I see no definition for "__user_stack_top" in the project):
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_32 - 0);
__top_Ram0_32 = 0x10000000 + 0x8000; // From "periph_flashiap_flashsig_Debug_mem.ld"
But the excerpt from the User Manual suggests to me that when using IAP to write Flash, the linker script should actually be modified to place the stack below the top 32 bytes, leaving those bytes for IAP, so it would need to be:
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_32 - 32);
I have seen no guidance regarding modifying the default linker scripts when using IAP, and the example project itself does not seem to take this into account when assigning the value for the top of the stack, so I'm confused about what's needed.
I intend to write Flash using IAP. Can I use the default linker script as provided in the example code, or does it actually need to be modified as I proposed above?
I want to avoid stack corruption crashes - can anyone please comment on this?
Thanks.
解決済! 解決策の投稿を見る。
I found the answer in another post - I was correct about this concern.
What needs to happen is to go to:
Project Properties -> C/C++ Build -> Settings -> MCU Linker -> Target
and set the "Stack Offset" to 32. The project as it appears in LPCXpresso does not do this - it has "Stack Offset" at 0.
It appears that the example project is in error here, so if you try to use it, make the above accommodation for the 32 IAP bytes...
Hi Matt,
I ran into the same issue.
Did you confirmed that the SRAM0 is used? It uses always the same, fixed address for this (start of SRAM0)?
Thank you
Yes, it's the uppermost 32 bytes that IAP uses, so the Top of Stack must be modified to avoid using those bytes. If you use the automated "managed linker script", you can make the setting as described in my earlier email above. If you're using a custom linker script, just modify the top of stack to be Top of Ram - 32. And yes, this is SRAM0.
Matt
Hi,
may i ask how did you managed to prove that?
I tried monitoring first 32 bytes in SRAM0 (actually it's equivalent on my UC), and it didn't change. I also tried to initialize it to zero before calling IAP functions, and it stayed on zeroes after calling them.
This would lead me to the conclusions that those bytes aren't used at all. I guess you probably managed to prove it somehow...
Thanks
Stjepan
It's not the first 32 bytes of SRAM0, but the last 32 bytes (at the top of memory). If you have 32kB of RAM, then this would be at addresses 0x00007fe0 - 0x00007fff
Matt
Thanks!
Always get confused with top/bottom wording when it comes to stack :smileygrin:
In order to give my contribution to the community here are my results:
LPC4337 uses area 0x10089FE0-0x10089FFF for this purpose.
I found the answer in another post - I was correct about this concern.
What needs to happen is to go to:
Project Properties -> C/C++ Build -> Settings -> MCU Linker -> Target
and set the "Stack Offset" to 32. The project as it appears in LPCXpresso does not do this - it has "Stack Offset" at 0.
It appears that the example project is in error here, so if you try to use it, make the above accommodation for the 32 IAP bytes...