LPC2368 Watchdog Timer

[lpcware]

Content originally posted in LPCWare by hemant on Sun Dec 22 21:07:38 MST 2013
Hi,

I am using LPC2368. It has pretty complex code running with 1 Timer interrupt (100uS continuous) , 2 UART interrupts, 1 SPI Interrupt, 1 USB interrupt and main loop.
Watchdog timer is of 5 sec and is feed in main loop and in different places.

System works well till 2 hrs.

After 2-3 hrs (undefined interval) there is sudden watchdog reset and system goes in error (handled in my code.)

In errata sheet of LPC2368 following is written

Introduction:
The Watchdog timer can reset the microcontroller within a reasonable amount of time if it
enters an erroneous state.

Problem:
After writing 0xAA to WDFEED, any APB register access other than writing 0x55 to
WDFEED may cause an immediate reset.

Work-around:
Avoid APB accesses in the middle of the feedsequence. This implies that interrupts and
the GPDMA should be disabled while feeding the Watchdog.

What is the cause of WDT reset??? that too after 2-3 hrs??
How to find at which point in code WDT reset occures?? I don't have any debugger.

Thanks
Hemant Undale

[lpcware]

Content originally posted in LPCWare by hemant on Sun Dec 22 21:19:25 MST 2013
I have posted this question on ARM forum as well.
 
If I assume  "my code keep re-entering ISR without kicking that dog for a while"

If I assume that this is happening then how should i come out of this situation, any workaround? Do I need to feed the dog in ISR?? Is it a good practice?

Also
I have some strange observation that when my system is handling error state (after watch dog reset), it jumps to a location in bootloader (that we have written) and hangs there.

Thanks
Hemant