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LPC JTAG connections

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LPC JTAG connections

‎02-11-2022 06:45 AM
1,462 Views
pietrodicastri
Senior Contributor II

Good morning

I am preparing the schematic for the LPC54102J512BD64QL.
I have a perplexity regarding the JTAG connections.

pietrodicastri_0-1644587055255.png

 

Is it ok?
The TDI is not in use according to the evaluation board schematic.

Just suggest ..

Thank You

Pietro

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‎02-21-2022 09:52 AM
1,426 Views
pietrodicastri
Senior Contributor II

Just a short comment. It will help

 

Thank You

Pietro

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‎02-23-2022 09:52 AM
1,410 Views
vicentegomez
NXP TechSupport
NXP TechSupport

I recommend you review the datasheet in section 13.3 Connecting power, clocks, and debug functions. The TDI is not populate because the interface is SWD, some uC doesn't have the interface of JTAG.

For more information and details consult this page. https://community.nxp.com/t5/LPCXpresso-IDE-FAQs/Design-Considerations-for-Debug/m-p/469565

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