How to use the EMC_FBCK pin

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

How to use the EMC_FBCK pin

Jump to solution
1,629 Views
MarcoAEE
Contributor II

Hello everybody,
I'm designing a new board based on LPC54618FBD208 with 2 SDRAM modules (16bit + 16bit data bus) and 1 parallel NOR Flash module (16bit data bus) managed by the EMC functional block of the MCU.
For the SDRAM I will use the Y-topology to have a 32bit data bus configuration but I don't quite understand how to use the EMC_FBCK pin.


Options:
1 - I have to connect it to the farthest point of the EMC_CLK0 signal (i.e. to the pin of one of the two SDRAMs, obviously the distance is the same for both since the distances must match)
2 - I have to connect it to the EMC_CLK0 pin with a track of length equal to the length of the signal of EMC_CLK0 between MCU and one of the two SDRAMs
3 - I have to connect it directly to the EMC_CLK0 pin regardless of its length

Thank you
Marco

0 Kudos
Reply
1 Solution
1,610 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I suggest you read the section 2.5.2 Function of EMC_CLKIN pin for an10935.pdf, which can be downloaded from the link:

https://www.nxp.com.cn/docs/en/application-note/AN10935.pdf

 

BR

XiangJun Rong

View solution in original post

4 Replies
1,618 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I suggest you download the an12026.pdf, which focuses on the SDRAM hardware connection and layout.

https://www.nxp.com.cn/docs/en/nxp/application-notes/AN12026.pdf

The EMC_FBCK is  the Feedback clock to sample SDRAM data, it has two sources, one is internal connection to EMC_CLKOUT0 via a delay logic by gates, another is connected to EMC_FBCLK pad. Pls rtefer to section 2.2 EMC pins in an12026.pdf.

Hope it can help you

BR

XiangJun Rong

 

0 Kudos
Reply
1,614 Views
MarcoAEE
Contributor II

Hi,

thanks, I had already viewed the application note, I saw the following note in section 2.2:

EMC can use either EMC_FBCLK pin or EMC_CLK0 loopback signal as its feedback input;
for EMC_CLK0 loopback signal, programmable delays can be added to clock feedback path, to compensate signal flight time.

I don't understand at what point I have to acquire the EMC_CLK signal with EMC_FBCLK pin (i.e. at what point I have to join the two tracks)

Thank you

Marco

0 Kudos
Reply
1,611 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I suggest you read the section 2.5.2 Function of EMC_CLKIN pin for an10935.pdf, which can be downloaded from the link:

https://www.nxp.com.cn/docs/en/application-note/AN10935.pdf

 

BR

XiangJun Rong

1,598 Views
MarcoAEE
Contributor II

Hi,
thanks, it is all clear! Bearing in mind that with LPC54618 the EMC frequency will be 90Mhz and that my layout is very compact, I can connect EMC_FBCLK directly to the EMC_CLK pin.
Thank you
Best regards
Marco

0 Kudos
Reply