Current draw exercise for LPCs

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Current draw exercise for LPCs

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sutton
Contributor III

Has anyone ever done any exercises or benchmark testing to see if LPCs actually can draw as little current as the datasheet states?  I was using a LPC2134 chip, which states can draw as little as 60uA in power down mode.  But, I haven't been able to get remotely close to that.  I have a product that draws around 500uA and we have spent many hours working on it.

 

So, I decided to get one of our blank circuit boards and just put down the LPC and surrounding caps and JTAG components.  Nothing connected to any port pins except where it needs to program the chip.  And, then all port pins either pulled high or low depending on the context of the pin.  Still can't get it remotely close to 60uA.  So, I was wondering if anyone had ever confirmed that one of these chips can get down below 100uA?  It would be nice to know the exact configuration to get that low draw and build up from there.

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gusarambula
NXP TechSupport
NXP TechSupport

Hello Sutton,

There are several factors that may impact power consumption. The datasheet only lists the ambient temperature and VDD voltage when listing the 60uA in power down mode, but while the whole setup is not listed, this number would most likely reflect a low power operation with all peripherals disabled.

Chapter 4 of Application Note 10404 (link below) covers some recommendations for reducing power consumption. There are several recommendations worth considering, like the power consumed by internal pull-ups, which hopefully may help you reduce the current power consumption in low power mode.

https://www.nxp.com/docs/en/application-note/AN10404.pdf

There is also an application note focused on power management (AN10421, link below) that covers power management in general.

https://www.nxp.com/docs/en/application-note/AN10421.pdf

I hope that this information helps!


Regards,
Gustavo

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sutton
Contributor III

Many thanks for the links.  That was very helpful.

 

I assume that the best case scenario is 60uA for the LPC and 40uA for the ports in output configuration.  For a total of ~100uA.  In my experiment, I have gotten it down to 200uA with nothing connected to any port pins. (besides JTAG).

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