Content originally posted in LPCWare by cpldcpu on Tue Aug 13 00:21:09 MST 2013
Quote: LPChobbyist
In general, my plan is to move all input-output functions (i.e. SCK/MOSI/SCT inputs) to the pins not bonded out on the physical (8-pin) package so that I could add more input/out functionality that actually needs interaction with the real world to the remaining few pins. I hope NXP keeps the existing switch matrix behavior in the future products because I like it a lot:-). One thing I hope also works is to connect multiple input functions to the same physical pin – i.e. I can configure one SCT input to track rising edges, another input to track falling edges and using both of them I can easily get pulse length.
Yes, that is a very elegant solution. It would helpful if NXP could comment on "feature". Connecting more than one input to a single pin is allowable per the user manual.
Quote: LPChobbyist
As for how much of other resources (Flash, SRAM) is available on a particular die, my rule of the thumb is to trust the DS/UM. Whenever I would talk to NXP people about if there is more of something on the chip or not, they would underline that even if one gets lucky with a particular revision of the device and gets some bonus feature(s) present, it can easily be revoked/fixed/removed/trimmed in the next design cycle so that it would match the official spec. So far I played it safe and did not get surprised.
Well, if you want your application to work, you should stick to the specification, that is obvious. Many MCU vendors use the same die across a range
of products and define the product only at test by fusing or different package options. I strongly suspect that the same is the case for the LPC800 series. However, even if additional memory is present in the LPC810, it may be disabled in a way that makes it impossible to reactivate without physically altering the device.