Using DMA to Emulate ADC Flexible Scan Mode

[anouarraddaoui]

Hello,

I am trying to write a baremetal code in KDS to run on the Freedom board K22.

My code is based on the application Note (AN4590) provided from Freescale.

The difference to the application note is that I am not using the PDB as a Hardware trigger for the ADC(, but this would also be very good option, if s.o have the complete code for the project described in AN4590). I am using SW to trigger THE FIRST ADC conversion, as it seemed for me easier to start.

The Code should allow me to read from channel8, then , 9, then 13 and then start all over again from 8 in a circular mode for times.

This what I am trying to do (the whole project is uploaded, have a look at the code) :

I configured the ADC0 to the 16-bit mode and activated the necessary clock for it.

Then I wrote to SC1A_ADCH(8) to start the conversion of the channel. The COCO Flag should then be the trigger to DMA Channel 1, initiating the transfer from ADC0_RA to ui_adc_result buffer in the SRAM.

Then I linked the channel 1 to the channel 0  ==> Link of DMAChannel 1 is the trigger to DMAchannel 0. So when the transfert of Data of Channel 1 is over, the Channel 0 is initiated. It moves the mux Data (for the ADC) from a saved buffer in RAM containing the number 8,9 and 15 to the ADC0_SCA1 register. This TRansfer should then start the new conversion and so, the second cycle begins.

I am using EmbSys Register debugging view to see the changes on the ADC and DMA registers and what I am seeing is just non sense. The cycle is not working as wanted.

Since am new at programming, I am asking for help. May be s.o had already the same issue and can help me with his code. A Project with PDB as a HW trigger to the ADC would also be a very good option.

Any recommendations are appreciated.

UPDATE :

I made some changes in the code, but I am not using the EmbSys register view any more. I made a breakpoint after the line of DMA_init() and I am following the following tutorial to see my ui_adc_result in the SRAM (kind of) "live" . (the new project is online).

https://mcuoneclipse.com/2015/07/14/automatic-variable-expression-and-memory-display-with-gdb-and-ec...

I managed yesterday evening to get it running

Now it seems to work fine... BUT !

the actual PROBLEM is :

if I do not change my ADC inputs ( 3 Potentiometers ), it does not last too long ( a few minutes (up to 7 mns) and sometimes even less than 1 minute), till the the numbers that I am getting (ui_adc_result) do not update anymore and a frozen set of bytes is coming out. (see the attatched Screenshot above near the Zip Folder for a better understanding).

I am going to upload the same code to another K22 FRDM Board and see what I get, and I will post then the results.

Any recommendations to solve the Problem described above are appreciated.

And if there is any other solution to watch the ui_adc_result SRAM buffer on KDS, please let me know.

UPDATE :

now everything works well ! (see my last comments for further information)

(working project is uploaded)

Original Attachment has been moved to: ADC_DMA_VREF.zip

[Hui_Ma]

Hi

Please move below ADC software trigger code from adc_init() function and call that code after DMA module be initialized.

ADC0_SC1A = ADC_SC1_ADCH(8);   // Start the conversion of Channel 8

Wish it helps.

Have a great day,
Ma Hui
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[anouarraddaoui]

Hi,

Thanks for the tipp :smileyhappy:

I made some changes in the code, but I am not using the EmbSys register view any more. I made a breakpoint after the line of DMA_init() and I am following the following tutorial to see my ui_adc_result in the SRAM (kind of) "live" . (the new project is online).

https://mcuoneclipse.com/2015/07/14/automatic-variable-expression-and-memory-display-with-gdb-and-ec...

I managed yesterday evening to get it running :smileyhappy: --

Now it seems to work fine... BUT !

the actual PROBLEM is :

if I do not change my ADC inputs ( 3 Potentiometers ), it does not last too long ( a few minutes (up to 7 mns) and sometimes even less than 1 minute), till the the numbers that I am getting (ui_adc_result) do not update anymore and a frozen set of bytes is coming out. (see the attatched Screenshot above near the Zip Folder for a better understanding).

[ I tried your tipp, but it didn"t work as I expected because the cycle won"t even begin..

I mean if the first conversion do not begin, the DMA channel 1 will not also begin, because the was no COCO Flag issued.

As a result the DMA Channel 0 will not also begin, since the transfert of DMA1 did not work. (See the cycle shema above, it is simpler to understand). ]

I am going to upload the same code to another K22 FRDM Board and see what I get, and I will post then the results.

Any recommendations to solve the Problem described above are appreciated.

And if there is any other solution to watch the ui_adc_result SRAM buffer on KDS, please let me know.

[anouarraddaoui]

:smileyhappy: :smileyhappy: :smileyhappy:

Now everything works just fine !

The main change is that I added the line number 173 ( "#define CLOCK_SETUP 1" ) to "ADC_DMA_VREF/Includes/system_MK22F51212.h" to get the maximum achievable clock frequency configuration.

I tested it than for more than one hour and everything worked well !

(I don"t get why, but that solved the problem)

I made then some other changes to the basic code of adc.c (ADC_init) and I am using now the internal VREF for the ADC instead of the 3.3V I used before.

The new version of the project is uploaded !

[Hui_Ma]

Hi

Thank you for the sharing.

Have a great day,
Ma Hui