Phase and Polarity of SPI in TWR K70F120M

[muhammad_qasim]

Hi

I am working on spi driver (Polling Mode) with Aardvark as slave. It is working fine on modes 0, 1 and 2. In mode 3 (Hi Phase, Hi Polarity i.e. Phase = 1, Polarity = 1), Transmit bytes are correct but first receive byte is sometimes corrupted (if Slave sends '0xAA', Master Receive '0x55').

This behavior is observed 8 out of 10 times. Rest of communication goes normal. Is Mode 3 Supported on this platform?

Regards

[jeremyzhou]

Hi,

Of course, the K70 supports the MODE 3 format.

The 0xAA(0x 1010 1010) shifts left a bit will become the 0x55 (0x 0101 0101), I think the root cause of this issue is the SPI timing sequencing mismatch.

So I'd highly recommend you to capture the SPI communication process by using the oscilloscope or logic analyzer, then to compare the timing sequencing with the illustration in the datasheet.
Have a great day,
Ping

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[muhammad_qasim]

Hi

Thanks for your feedback. I was observing the same point that you mentioned. i.e. Right Shift one bit. I will check with oscilloscope. Meanwhile, here is the settings of SPI

System Clock: 120MHz

SPI Clock: 60MHz

Baud Rate: 1000 KHz

Chip Select used: 1

SPI Name: spi2

CTAR Register Settings: 0x78a86665

Regards

[jeremyzhou]

Hi,

I think the configuration of the PCS to SCK Delay，After SCK Delay, Delay after Transfer in the SPIx_CTARn register cause the frame data shifting.
Have a great day,
Ping

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[muhammad_qasim]

Hi,

I have tested with min and max values of PCS to SCK Delay，After SCK Delay, Delay after Transfer but no way.

Still only the first character of first transaction is disturbed. After that it works fine.

Regards

[jeremyzhou]

Hi,

Do you have the oscilloscope or logic analyze to capture the SPI transferring signal? if not, I'd highly recommend to do it.

It's efficient way to find out the root cause of this issue.

Hope it helps.
Have a great day,
Ping

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------