MK66 custom board, using USB1, no PLL lock

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MK66 custom board, using USB1, no PLL lock

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H_Grobben
Contributor I

I'm developing an application which uses the High speed USB in device mode from the Kinetis 66. I based my code on the CDC + MSC lite example code from the MCUXpresso SDK.

I got it to build in our custom environment (after removing the MSC part, I don't need it). But the processor gets stuck in the APPInit, when it is checking for the USBPHY PLL to lock (function bool CLOCK_EnableUsbhs0PhyPllClock(clock_usb_phy_src_t src, uint32_t freq)).

I've found several topics covering the issue, and walked through them:

- we use the xtal mode, not extosc, so no ERRATA_ID_9712 dependency (https://community.nxp.com/message/852272)

- correct xtal (16 MHz)

- I have a correct voltage on USB VREG pin (3v3) delivered from VREG_IN1 and VREG_IN0

- all assert() statements in the beginning of the function checked out correctly

-- 32k is running 

I didn't check any runmode in previous init routines, but can they interfere with the settings introduced in this function, stopping the PLL to lock?

Please advice.

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mjbcswitzerland
Specialist V

Hi

I found that it is important to have the USB VREG for the K65's PLL to lock but not the K66. The FRDM-K66F board doesn't have this connected and I found that the PLL always locks, even without VREG.

Do a comparison with the K66 targets in the uTasker project (it supports HS CDC, MSB, HID, Audio composite devices on various K65/K66 boards, including FRDM-K66F and Teensy 3.6)

Web:      https://github.com/uTasker/uTasker-Kinetis
HTTPS:    https://github.com/uTasker/uTasker-Kinetis.git
SSH:      git@github.com:uTasker/uTasker-Kinetis.git

Regards

Mark

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