Is there a way to run the USB HS controller (USB1) on the K65 without running the PHY?
We do not have an external clock. Can we generate a 480MHz clock for the PHY from the 48MHz internal clock?
Can we just disable HS functionality and run the HS controller in full-speed (without having to wait for the PLL to lock)?
Our USB0 pins are not connected. Is there a way to use the USB FS controller with the USB1 pins?
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Hi Sam,
I don't think customer can use K65 HS USB without embedded PHY.
It doesn't provides a ULPI interface as normal K70 USB HS module, it have to use the internal PHY for K65 USB HS.
Thank you for the attention.
Have a great day,
Ma Hui
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Hi Sam,
I don't think customer can use K65 HS USB without embedded PHY.
It doesn't provides a ULPI interface as normal K70 USB HS module, it have to use the internal PHY for K65 USB HS.
Thank you for the attention.
Have a great day,
Ma Hui
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Thank you for providing this information. Does the ULPI interface allow for ignoring the PHY and using an internal clock source instead of the PHY? Is there any way to run the USBHS (USB1) controller without UTMI + PHY? Would ULPI allow for that? After further reading, my impression is that USB always needs a PHY. USB1.0 used a serial connection to the PHY and USB2.0 uses a parallel connection called UTMI. Does ULPI allow for reverting back to the serial connection of USB1.0 at the cost of only being able to run the PHY in full-speed mode?
I don't understand the hardware well enough, but is there any way (through register settings) to force the USBHS controller to not need a 480MHz clock? If not, is there any way to get it to use an internal clock as an input to the PHY PLL (instead of the external crystal)?
1> On-chip UTMI transceiver supports high speed (480 Mbps), full speed, and low speed operation in host mode, and high-speed and full-speed operation in device
mode;
2> Please check below link about the different between ULPI vs. UTMI interface.
ULPI Interface Standard for High-Speed USB 2.0 IP Systems - Mentor Graphics
The USB PHY is integrated a 480MHz PLL, there will generate the 480MHz clock with external reference clock.
Thank you for the attention.
Have a great day,
Ma Hui
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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