K22/K66 holds reset low when chip is erased and power cycled

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K22/K66 holds reset low when chip is erased and power cycled

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cwolff
Contributor II

I have been developing code on a K22 micro.  I started with the FRDM-K22 and have moved onto a custom PCB.  During my development, I found that if I erase the flash contents and power cycle the board, the MCU will hold the reset line low indefinitely.  I have multiple debug tools and the only way to 'recover' from this state with a debugger is to use a Segger J-Link to program code back to the device.  Other debug tools see that the micro is in reset and waits for the device to come out of reset.  It will eventually time out since the micro never exits reset.

The only other way to get the device to come out of reset in this state is to toggle the EZ Port chip select line, which just puts the micro into EZ Port mode.  Since the board is now out of reset, I can use any of my debuggers to connect and re-program the target.

I am able to reproduce this on my K22 custom PCB, a FRDM-K22F and a FRDM-K66F

Is this the correct intended behavior?  Is there a workaround (other than toggling the EZP_CS line) to get the MCU out of reset when the flash is blank?

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mjbcswitzerland
Specialist V

Corey

Can you specify what your erase method was? Was it a commanded erase with the debugger or was it an erase/mass erase under SW control?

The difference is that the debuggers erase and program the security byte to 0xfe and a software erase/mass erase leaves it at 0xff (unless it specifically additionally writes this byte before a reset), which puts the device in secured mode.

The debuggers usually report that the device is secured and asks whether you would like to unsecure.

Otherwise I haven't noticed that the device (FRDM-K22F or FRDM-K66F) stays in reset, although sometimes some debuggers seem to have problems with certain programs that fault immediately after reset. It helps to have several different tools available in case one can't handle a certain situation.

Regards

Mark

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cwolff
Contributor II

When I erase the part, I am using the SEGGER J-Link and either J-Flash's erase chip/erase sectors command or J-Link Commander's erase command.  Using either of these methods will result in the reset line pulled low when the board reboots.  As mjbcswitzerland‌ commented, the flash will be secured because flash addresses 0x400 to 0x40F will be 0xFF.

2017_10_05_15_26_28_SEGGER_J_Flash_V6.18_C_Users_cwolff.PD_Documents_K22.jflash_.png

2017_10_05_15_42_00_C_windows_system32_cmd.exe_jlink.png

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jorge_a_vazquez
NXP Employee
NXP Employee

Hi Corey Wolff

The RESET pin waveform is normal with device whose flash is empty. MCU core will try to fetch instructions from flash and when it's empty, it will enter exception and then reset continuously. You should see that reset line is pulled high and then go back to low. Please check the following post: https://community.nxp.com/thread/383037 

Best Regards

Jorge Alcala

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