Interrupt then Watchdog timeout on K22FN1M0AM12

[JustinGilmore]

Good afternoon to all.  I am working on a project that is having spontaneous watchdog resets for reasons unknown (probably something stupid).  I have referred to the datasheet for guidance as well as processor expert (using KDS 3.2.0).

The code that is generated is as follows.  I have omitted the PE generated comments for code clarity

NVICIP22 = NVIC_IP_PRI22(0x00);
NVICISER0 |= NVIC_ISER_SETENA(0x00400000);
EnterCritical();
WDOG_UNLOCK = WDOG_UNLOCK_WDOGUNLOCK(0xC520); /* Key 1 */
WDOG_UNLOCK = WDOG_UNLOCK_WDOGUNLOCK(0xD928); /* Key 2 */
WDOG_WINH = WDOG_WINH_WINHIGH(0x00); /* Setup window register high */
WDOG_WINL = WDOG_WINL_WINLOW(0x00); /* Setup window register low */
WDOG_TOVALH = WDOG_TOVALH_TOVALHIGH(0x01C0); /* Setup time-out value register high */
WDOG_TOVALL = WDOG_TOVALL_TOVALLOW(0x02); /* Setup time-out value register low */
WDOG_PRESC = WDOG_PRESC_PRESCVAL(0x00); /* Setup status register */
WDOG_STCTRLL = (WDOG_STCTRLL_INTFLG_MASK | 0x01U); /* Setup status register */
WDOG_STCTRLH = WDOG_STCTRLH_DISTESTWDOG_MASK |
       WDOG_STCTRLH_BYTESEL(0x00) |
       WDOG_STCTRLH_WAITEN_MASK |
     //WDOG_STCTRLH_DBGEN_MASK | <- We'll get to this later
       WDOG_STCTRLH_STOPEN_MASK |
       WDOG_STCTRLH_IRQRSTEN_MASK |
       WDOG_STCTRLH_CLKSRC_MASK |
       WDOG_STCTRLH_WDOGEN_MASK |
       0x0100U; /* Setup control register */

ExitCritical();

From what I see the WDG registers are correct as well as the NVIC registers, yet no interrupt occurs.

The vector table clearly calls out the interrupt (code from vectors.c)

(tIsrFunc)&WDog_Interrupt, /* 0x26 0x00000098 0 ivINT_WDOG_EWM used by PE */

I have set breakpoints to this function and have purposefully allowed my code to timeout after 500ms to test its functionality.  All I am getting is instant system resets back to address 0 instead of jumping to that interrupt routine and THEN resetting. 

In regards to the WDOG_STCTRLH_DBGEN_MASK (0x20), anytime I try and enable this bit for debugging, the entire register fails to update with ANY of the bits that are supposed to be set. I'm under the assumption that my PE Micro debugger is ok to try and debug this watchdog?

If anyone else has experienced this issue a helping hand would be greatly appreciated.

Thank you

-Justin Gilmore

[Robin_Shen]

This problem has been solved in the case. For the convenience of other customers who encounter similar problems, please refer to the answer in: Watchdog ISR is not entered on Kinetis

Best Regards,
Robin
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