Hi, could anyone help me? I am having trouble to configure FTM2 interrupt. I am using the code below without success. My objective is to configure FTM2 in capture mode so I need to analyse in the interrupt function when the two rising edges occurred and when the counter overflow occurred.
And I have a doubt: when do I use FTM2_IRQHandler and FTM2_ISR? What's the difference?
FTM2_MODE|=0x04; //WPDIS=1 Write protection is disabled.
FTM2_C0V = 0x0000;
FTM2_C1V = 0x0000;
FTM2_SYNCONF |= 0x0280;
FTM2_QDCTRL &= 0xFFFFFFFE;
FTM2_SC &= 0xFFFFFFDF;
FTM2_CNTIN = 0x0000;
FTM2_MOD = 0xFFFF;
FTM2_CONF=0xC0; //BDMMODE=11 Functional mode, CH(n)F Bit can be set
//NUMTOF = 0000 The TOF bit is set for each counter overflow.
//GTBEEN=0 Use of an external global time base is disabled.
//GTBEOUT=0 A global time base signal generation is disabled.
FTM2_MODE|=0x01; // FTMEN = 1 All registers including the FTM-specific registers (second set of registers)
//are available for use with no restrictions.
FTM2_COMBINE |= 0x04; // DECAPEN0 = 1 Dual Edge Capture Mode Enable For n = 0
//The Dual Edge Capture mode in this pair of channels is enabled.
//Enables the Dual Edge Capture mode in the channels (n) and (n+1). This bit reconfigures the function // of
//MSnA, ELSnB:ELSnA and ELS(n+1)B:ELS(n+1)A bits in Dual Edge Capture mode
FTM2_COMBINE |= 0x0020;
FTM2_FILTER = 0x07;
FTM2_C0SC &= 0xFFFFFFEF; // Channel (n=0) Status And Control
// MSA = 0 Dual Edge Capture One-Shot Capture mode
FTM2_C1SC &= 0xFFFFFFEF; // Channel (n=0) Status And Control
// MSA = 0 Dual Edge Capture One-Shot Capture mode
FTM2_C0SC &= 0xFFFFFFF7; //ELSB = 0 Rising edge
FTM2_C0SC |= 0x04; //ELSA = 1 Rising edge
FTM2_C1SC &= 0xFFFFFFF7; //ELSB = 0 Rising edge
FTM2_C1SC |= 0x04; //ELSA = 1 Rising edge
FTM2_C0SC |= 0x40; // CHnIE (Channel Interrupt Enable) = 1 Enable channel interrupts.
FTM2_C1SC |= 0x40; // CHnIE (Channel Interrupt Enable) = 1 Enable channel interrupts.
FTM2_SC |= 0x08; //Status And Control
//TOF=0 FTM counter has not overflowed
//TOIE=0 Disable TOF interrupts. Use software polling.
//CPWMS=0 FTM counter operates in Up Counting mode.
//CLKS=00 No clock selected. This in effect disables the FTM counter.
// CLKS=01 System clock
//PS=111 Divide by 128
FTM2_C0SC &= 0xFFFFFF7F; //CH(n)F = 0
FTM2_C1SC &= 0xFFFFFF7F; //CH(n+1)F = 1
FTM2_SC |= 0x40; //Habilita TOIE
FTM2_COMBINE |= 0x08; //DECAP0=1 The dual edge captures are active.
//Enables the capture of the FTM counter value according to the channel (n) input event and the
//configuration of the dual edge capture bits.
Thank you very much Earl Goodrich and Xiang Jun Rong! You both helped me a lot!
Hi, Luiz,
From your code, I do not see the code to set up NVIC, pls add the NVIC code if you do not have.
I have checked the K64, the FTM2 module has only one interrupt vector with index 44, so you can set up the NVIC for FTM2 as following:
void Ftm2_interruptInit(void)
{
NVICIP44=0x30; //set FTM2 interrupt priority
NVICICPR1|=1<<12;
NVICISER1|=1<<12;
}
Pls download an5142.pdf, which has the code to set up FTM in capture mode at section 3.8:
http://cache.nxp.com/assets/documents/data/en/application-notes/AN5142.pdf?fsrch=1&sr=1&pageNum=1
The FTM2_IRQHandler and FTM2_ISR are the same, pls check the vectors.c to know which function is defined
Earl Goodrich gave your several links, that is helpful.
Hope it can help you
BR
Xiangjun Rong
You don't show here how you want to process within an interrupt, and I don't see any code here to enable the interrupt at the NVIC, but you might gain some insight from these:
https://community.nxp.com/thread/430432
How to re-initialize Flex Timer on Channel input trigger?
and the most important takeaway from that is that for pulse-width or period measurement, since you are letting the counter free-run (mod = 0xFFFF) you don't need to coordinate overflow interrupt reckoning with channel-value math -- just do it as unsigned 16-bit (uint16_t) vars (and don't let the compiler promote to larger!) and pure twos-complement math WILL get you the proper elapsed-counts (as long as the difference is less than one whole rollover, of course!).
PS -- if you would use the '#define(d)' register-content items from your processor-header, in addition to just the register names, it would make it possible for us (and you!) to read your settings.