Hi Clive,
I suggest comparing your Processor Expert screen to mine (from CodeWarrior v10.6). There may be something slightly different. As I state, I don't get an error.
The only changes that I made from the default configuration were:
1) change Clock settings > Clock source settings > Clock source setting 0 > MCG settings > FLL settings > FLL output (MHz) to "48" - which gets translated to "47.972352"
2) change Clock configurations > Clock configuration 0 > System clocks > Core clock to "48" - which gets translated to "47.972352"
3) change Clock configurations > Clock configuration 0 > System clocks > Bus clock to "24" - which gets translated to "23.986176"
When using the stand alone Processor Expert Software Microcontroller Driver Suite v10.4, these frequency changes are made via drop down menus. Here are the corresponding screen shots, with the changes highlighted, first under the "Properties" tab:
Then under the "Clock configurations" tab:
Selecting the frequencies from the menus shouldn't generate any sort of error.
Best Regards,
Derrick
Hi Clive,
Are you using Processor Expert from within CodeWarrior or the separate tool? Current versions are:
- CodeWarrior for Microcontrollers v10.6 (with Processor Expert integrated within)
- Processor Expert Software, Microcontroller Driver Suite v10.4 (stand alone tool version)
I checked both of these and I do not see the error which you mention. Both generate the same code:
/* System clock initialization */
/* SIM_CLKDIV1: OUTDIV1=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,OUTDIV4=3,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = (SIM_CLKDIV1_OUTDIV1(0x00) | SIM_CLKDIV1_OUTDIV4(0x03)); /* Set the system prescalers to safe value */
/* SIM_SCGC5: PORTB=1,PORTA=1 */
SIM_SCGC5 |= (SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTA_MASK); /* Enable clock gate for ports to enable pin routing */
if ((PMC_REGSC & PMC_REGSC_ACKISO_MASK) != 0x0U) {
/* PMC_REGSC: ACKISO=1 */
PMC_REGSC |= PMC_REGSC_ACKISO_MASK; /* Release IO pads after wakeup from VLLS mode. */
}
/* SIM_CLKDIV1: OUTDIV1=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,OUTDIV4=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */
SIM_CLKDIV1 = (SIM_CLKDIV1_OUTDIV1(0x00) | SIM_CLKDIV1_OUTDIV4(0x01)); /* Update system prescalers */
/* SIM_SOPT2: TPMSRC=1 */
SIM_SOPT2 = (uint32_t)((SIM_SOPT2 & (uint32_t)~(uint32_t)(
SIM_SOPT2_TPMSRC(0x02)
)) | (uint32_t)(
SIM_SOPT2_TPMSRC(0x01)
)); /* Set the TPM clock */
/* Switch to FEI Mode */
/* MCG_C1: CLKS=0,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
MCG_C1 = MCG_C1_CLKS(0x00) |
MCG_C1_FRDIV(0x00) |
MCG_C1_IREFS_MASK |
MCG_C1_IRCLKEN_MASK;
/* MCG_C2: LOCRE0=0,RANGE0=0,HGO0=0,EREFS0=0,LP=0,IRCS=0 */
MCG_C2 &= (uint8_t)~(uint8_t)(
MCG_C2_LOCRE0_MASK |
MCG_C2_RANGE0(0x03) |
MCG_C2_HGO0_MASK |
MCG_C2_EREFS0_MASK |
MCG_C2_LP_MASK |
MCG_C2_IRCS_MASK
);
/* MCG_C4: DMX32=1,DRST_DRS=1 */
MCG_C4 = (uint8_t)((MCG_C4 & (uint8_t)~(uint8_t)(
MCG_C4_DRST_DRS(0x02)
)) | (uint8_t)(
MCG_C4_DMX32_MASK |
MCG_C4_DRST_DRS(0x01)
));
/* OSC0_CR: ERCLKEN=1,??=0,EREFSTEN=0,??=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
OSC0_CR = OSC_CR_ERCLKEN_MASK;
while((MCG_S & MCG_S_IREFST_MASK) == 0x00U) { /* Check that the source of the FLL reference clock is the internal reference clock. */
}
while((MCG_S & 0x0CU) != 0x00U) { /* Wait until output of the FLL is selected */
}
Keep in mind that the maximum bus frequency is 24MHz. Here is how I configured this in CodeWarrior:
Best Regards,
Derrick
