Both the FTM and DSPI sections of the K60 reference manual make reference to the "system clock" being the clock source for these peripherals (see below). But "system clock" has a very specific meaning as defined in section 5.4 Clock Definitions. It relates to the core clock.
All indications are these peripherals actually use the "[Peripheral] Bus Clock", which is a maximum 1/2 the core clock. Is this indeed the case?
If so this needs a-fix'n in the Reference Manual.
53.4.3.1 Baud Rate Generator
The Baud Rate is the frequency of the Serial Communication Clock (SCK). The system
clock is divided by a prescaler (PBR) and scaler (BR) to produce SCK with the
42.1.2 Features
The FTM features include:
• FTM source clock is selectable
• Source clock can be the system clock, the fixed frequency clock, or an external
clock
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Hi
Some periperals are clock from the core clock rather than the peripheral clock. See for example the UARTs : UARTs 0 and 1 are clocked from the core clock whilst and other UARTs are clocked from the peripheral clock. This means that they usually need different baud settings since the bus clock is usually slower than the system clock (since the bus clock can not always operate as fast as the system clock).
In the case of the DSPI and FTM the documentation is a bit strange since they do use the bus clock but refer to it as the system clock (obviously in a different context) - see below:
Note that the bus clock is not in fact a maximum of half the core clock - it has a lower maximum speed that the core clock but if the core and system clock were 20MHz then the bus clock could also be 20MHz, for example.
Regards
Mark
Hi
Some periperals are clock from the core clock rather than the peripheral clock. See for example the UARTs : UARTs 0 and 1 are clocked from the core clock whilst and other UARTs are clocked from the peripheral clock. This means that they usually need different baud settings since the bus clock is usually slower than the system clock (since the bus clock can not always operate as fast as the system clock).
In the case of the DSPI and FTM the documentation is a bit strange since they do use the bus clock but refer to it as the system clock (obviously in a different context) - see below:
Note that the bus clock is not in fact a maximum of half the core clock - it has a lower maximum speed that the core clock but if the core and system clock were 20MHz then the bus clock could also be 20MHz, for example.
Regards
Mark