Difference between UART0 and UART1 in LPSCI Driver

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Difference between UART0 and UART1 in LPSCI Driver

Jump to solution
824 Views
MarkPotts
Contributor III

I am using UART1 in an MKL26Z4 design but get a warning message : expected 'UART0_Type *' but argument is of type 'UART_Type *' in calls to LPSCI_GetStatusFlags(UART1) and LPSCI_ReadByte(UART1).

I am not clear about the difference between UART0 and other UARTs in the LPSCI driver. I see that there is a separate set of defines for UART0 in my generated header file MKL26Z4.h but I don't understand why or how to fix the warning.

Any clarification would be helpful.

0 Kudos
Reply
1 Solution
735 Views
MarkPotts
Contributor III

I think the problem was caused by missing peripheral and pin assignments. It disappeared when these were fixed and automated changes applied. UART0 probably has different headers because it is also used as the debug console.

View solution in original post

0 Kudos
Reply
2 Replies
736 Views
MarkPotts
Contributor III

I think the problem was caused by missing peripheral and pin assignments. It disappeared when these were fixed and automated changes applied. UART0 probably has different headers because it is also used as the debug console.

0 Kudos
Reply
766 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

The uart0 and Uart1 have different registers, so the register group must be redefined in SDK.

I copy the register definition for the UART0 and UART1/2 as the following, the red is unique register for UART0.

For the detailed inf about match, pls refer to 39.2.9 UART Match Address Registers 1 (UARTx_MA1).

39.2.9 UART Match Address Registers 1 (UARTx_MA1)
The MA1 and MA2 registers are compared to input data addresses when the most
significant bit is set and the associated C4[MAEN] bit is set. If a match occurs, the
following data is transferred to the data register. If a match fails, the following data is
discarded. Software should only write a MA register when the associated C4[MAEN] bit
is clear.

 

xiangjun_rong_0-1709609167480.png

Hope it can help you

BR

XiangJun Rong

0 Kudos
Reply