Hello!
I use a example for SDK in MCUXpresso but when debug the code, it is stoped.
Here the code from clock_config.c:
/*******************************************************************************
* Variables for BOARD_BootClockRUN configuration
******************************************************************************/
const mcg_config_t mcgConfig_BOARD_BootClockRUN =
{
.mcgMode = kMCG_ModePEE, /* PEE - PLL Engaged External */
.irclkEnableMode = kMCG_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
.ircs = kMCG_IrcSlow, /* Slow internal reference clock selected */
.fcrdiv = 0x0U, /* Fast IRC divider: divided by 1 */
.frdiv = 0x0U, /* FLL reference clock divider: divided by 32 */
.drs = kMCG_DrsLow, /* Low frequency range */
.dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
.pll0Config =
{
.enableMode = MCG_PLL_DISABLE, /* MCGPLLCLK disabled */
.prdiv = 0x1U, /* PLL Reference divider: divided by 2 */
.vdiv = 0x0U, /* VCO divider: multiplied by 24 */
},
};
const sim_clock_config_t simConfig_BOARD_BootClockRUN =
{
.pllFllSel = SIM_PLLFLLSEL_MCGPLLCLK_CLK, /* PLLFLL select: MCGPLLCLK clock */
.er32kSrc = SIM_OSC32KSEL_LPO_CLK, /* OSC32KSEL select: LPO clock */
.clkdiv1 = 0x10010000U, /* SIM_CLKDIV1 - OUTDIV1: /2, OUTDIV4: /2 */
};
const osc_config_t oscConfig_BOARD_BootClockRUN =
{
.freq = 8000000U, /* Oscillator frequency: 8000000Hz */
.capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */
.workMode = kOSC_ModeOscLowPower, /* Oscillator low power */
.oscerConfig =
{
.enableMode = kOSC_ErClkEnable, /* Enable external reference clock, disable external reference clock in STOP mode */
}
};
/*******************************************************************************
* Code for BOARD_BootClockRUN configuration
******************************************************************************/
void BOARD_BootClockRUN(void)
{
/* Set the system clock dividers in SIM to safe value. */
CLOCK_SetSimSafeDivs();
/* Initializes OSC0 according to board configuration. */
CLOCK_InitOsc0(&oscConfig_BOARD_BootClockRUN); [HERE STOP, below the fuction]
CLOCK_SetXtal0Freq(oscConfig_BOARD_BootClockRUN.freq);
/* Configure FLL external reference divider (FRDIV). */
CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv);
/* Set MCG to PEE mode. */
CLOCK_BootToPeeMode(kMCG_OscselOsc,
kMCG_PllClkSelPll0,
&mcgConfig_BOARD_BootClockRUN.pll0Config);
/* Configure the Internal Reference clock (MCGIRCLK). */
CLOCK_SetInternalRefClkConfig(mcgConfig_BOARD_BootClockRUN.irclkEnableMode,
mcgConfig_BOARD_BootClockRUN.ircs,
mcgConfig_BOARD_BootClockRUN.fcrdiv);
/* Set the clock configuration in SIM module. */
CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
/* Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
}
/////////////////////////////////////////////////
Code from fsl_clock.c
///////////////////////////////////////////////////
void CLOCK_InitOsc0(osc_config_t const *config)
{
uint8_t range = CLOCK_GetOscRangeFromFreq(config->freq);
OSC_SetCapLoad(OSC0, config->capLoad);
OSC_SetExtRefClkConfig(OSC0, &config->oscerConfig);
MCG->C2 = ((MCG->C2 & ~OSC_MODE_MASK) | MCG_C2_RANGE(range) | (uint8_t)config->workMode);
if ((kOSC_ModeExt != config->workMode) && (OSC0->CR & OSC_CR_ERCLKEN_MASK))
{
/* Wait for stable. */
while (!(MCG->S & MCG_S_OSCINIT0_MASK)) [HERE STOP]
{
}
}
}
Hi Adrian Pellegrino,
If you are using FRDM-KL46Z board with latest MCUXPresso SDK_2.4.1_FRDM-KL46Z and MCUXpresso IDE.
Please check the Y1 crystal is well connected to Pin50 Pin51 of MCU or not.
I am able to run gpio example on FRDM-KL46Z(SCH-27822 REV C) board.
Best Regards,
Robin
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