About accuracy of TWR-KM34Z50's 24bit SDADC

[romehuang]

Hi I'm evaluating TWR-KM34Z50's 24bit SDADC, I wired both EXT_SD_ADP0 and EXT_SD_ADM0 to VSSA, and run afe_test, then I got values between 0x6df8 and 0x824a, it seems 13 bit shifting. Anything wrong in my configuration or is it normal?

Best Regards,

Rome.

[Hui_Ma · Accepted solution]

Hi Rome,

When using the AFE demo default setting, the AFE channel0 value with bigger shifting. Please check below FreeMaster scope copy:

Then I change the default AFE module setting with max. oversampling number and low down AFE module refer clock with below code:

  AFE_ChanInit (CH0, AFE_CH_SWTRG_CCM_PGAOFF_CONFIG(DEC_OSR2048), 0, PRI_LVL0, NULL);

  AFE_Init     (AFE_MODULE_RJFORMAT_CONFIG(AFE_PLL_CLK, AFE_DIV256, 12288000));

After that, I will get below FreeMaster scope copy:

Wish it helps.

Have a great day,
best regards,

Ma Hui

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[romehuang]

Thanks for the answer, the shifting reduced dramatically.

Best Regards,

Rome.