void init_clock_config (void)
{
/* Clock module uses normal PLL mode with 16.0000 MHz external reference
Bus clock frequency = 60.00 MHz
Processor clock frequency = 3 x bus clock = 180.00 MHz
Dithering disabled
*/
/* Check to see if the SDRAM has already been initialized
by a run control tool. If it has, put SDRAM into self-refresh mode before
initializing the PLL
*/
if (MCF_SDRAMC_SDCR & MCF_SDRAMC_SDCR_REF)
MCF_SDRAMC_SDCR &= ~MCF_SDRAMC_SDCR_CKE;
/* Temporarily switch to LIMP mode
NOTE: Ensure that this code is not executing from SDRAM, since the
SDRAM Controller is disabled in LIMP mode
*/
MCF_CCM_CDR = (MCF_CCM_CDR & 0xf0ff) | MCF_CCM_CDR_LPDIV(0x2);
MCF_CCM_MISCCR |= MCF_CCM_MISCCR_LIMP;
/* Configure the PLL settings */
MCF_PLL_PODR = MCF_PLL_PODR_CPUDIV(0x2) |
MCF_PLL_PODR_BUSDIV(0x6);
MCF_PLL_PFDR = MCF_PLL_PFDR_MFD(0x5a);
MCF_PLL_PLLCR = 0;
MCF_PLL_PMDR = 0;
/* Enable PLL and wait for lock */
MCF_CCM_MISCCR &= ~MCF_CCM_MISCCR_LIMP;
while ((MCF_CCM_MISCCR & MCF_CCM_MISCCR_PLL_LOCK) == 0)
;
/* If we put the SDRAM into self-refresh mode earlier, restore mode now */
if (MCF_SDRAMC_SDCR & MCF_SDRAMC_SDCR_REF)
MCF_SDRAMC_SDCR |= MCF_SDRAMC_SDCR_CKE;
}
void main()
{
init_clock_config();
******
}