i am using freescale Controller MCF52233, and have already developed three different projects with the following interrupt level
1) UART 0 IL – 5 IP – 2
2) UART 1 IL – 3 IP – 5
3) Pulse1 IL – 6 IP – 5
4) Pulse2 IL – 6 IP – 3
5) RTC IL – 6 IP – 1
6) Watch Dog IL – 6 IP – 7
7) PowerFail IL – 1 IP – Mid
I have not noticed any problem when execution of program in the field, But when i add one more interrupt for computer interface(UART2) at IL – 7 & IP – 3 some inputs pulses/signals are missing, failure of frequent communication with UART0 are also encountered. if i decrease the interrupt level for UART2 data get lose
I want to know, how to handle interrupts without loss of low level interrupts. Brief introduction will help me to solve this problem.
Interrupt level 7 is non-maskable. You simply cannot use it in any way that sychronizes or cooperates with other code. The only place I have used it is for a watchdog timeout which forces a software reset. Even if you set the processor priority level to 7 as a way to disable interrupts, level 7 interrupts will still bust thru.
Use only levels 1-6 for normal interrupts. Note that the levels for the edge port interrutps are fixed, so use of any edge port interrupt forces some decisions about interrupt priority to the hardware layout stage.
Coldfire hardware allows interrupts at higher levels to preempt lower level ISRs (levels, not priorities within levels). With careful programming and level selection, you can construct systems that support very fast interruupt response where needed. By default, the CodeWarrior tools insert a STLDSR insttruction into each C ISR, which defeats the preemption. In my opinion, the STLDSR thing is only appropriate for unusual circumstances and should not be the default.