Hello,
I would like to change the configuration of the CPC, but when I try to enable it, the code just remains frozen. I do not know if I need permission to enable CPC or something? I am already following the steps to changing the configuration of an enable CPC (PAGE 382 P4080 QorIQ Multicore Communication Processor Reference Manual).
Thanks!
Regards,
Himalai Bello
已解决! 转到解答。
Hello Himalai,
Please refer to the attached source code from u-boot.
Please refer to functions disable_cpc_sram, invalidate_cpc and enable_cpc to check what you missed.
For P4080DS defined the following errata
#define CONFIG_SYS_FSL_ERRATUM_CPC_A002
#define CONFIG_SYS_FSL_ERRATUM_CPC_A003
Have a great day,
Yiping
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Hi yiping! thanks! It was a synchronization problem. Now I need to change the configuration of the DDR Controllers and I can not disable any of the controllers, the program stops after trying to disable one of the DDR Controllers.
Thanks!!
Regards,
Hymalai bello
Hello Hymalai,
Please try to use following sequence if it is needed to reconfigure already enabled memory controller.
Set DDR_SDRAM_CFG[MEM_HALT] bit;
Read DDR_SDRAM_CFG register to ensure that MEM_HALT has been set;
Clear DDR_SDRAM_CFG[MEM_EN] bit;
Make configuration changes (if needed);
Set DDR_SDRAM_CFG[MEM_EN] bit;
Clear DDR_SDRAM_CFG[MEM_HALT] bit
Have a great day,
Yiping
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Hello Himalai,
Please refer to the attached source code from u-boot.
Please refer to functions disable_cpc_sram, invalidate_cpc and enable_cpc to check what you missed.
For P4080DS defined the following errata
#define CONFIG_SYS_FSL_ERRATUM_CPC_A002
#define CONFIG_SYS_FSL_ERRATUM_CPC_A003
Have a great day,
Yiping
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
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