A guide to designing a functionally safe power supply for high end automotive microprocessors

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A guide to designing a functionally safe power supply for high end automotive microprocessors

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NXP Employee
NXP Employee
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Introduction:

Processing requirements for automotive ECUs has been on the rise. This has resulted in automotive microprocessors demanding more power while also going to smaller manufacturing nodes.

This trend presents a two-fold challenge for a power supply designer:

  • Deliver a high power
  • Deliver the higher power at a smaller allowed tolerance

Board space and budgets are constrained so the power supply designer needs to solve the above 2 challenges while staying below the space and cost budgets.

On top of this, there is a trend to meeting functional safety requirements for the system of which the power supply is a critical part of. This blog presents considerations a designer needs to take while designing such a power supply and how the PF53 core supply regulator from NXP Semiconductors offers a convenient solution.

Power Supply Focus Points:

  1. Voltage and current requirements
    Based on the processor and use-cases considered, the voltage and maximum current required from the power supply can vary. To support this, it is important to have a wide range of output voltage programmability and a portfolio of products with different load current capability.

    The PF53 offers an output voltage range from 0.5 V to 1.2 V in 5 mV steps. The startup voltage is set via one-time-programmable (OTP) memory and can be subsequently changed using I²C. The family is also offered as 8 A (PF5301), 12 A (PF53), and 15 A (PF5302) versions.

    nxpadmin_0-1686330063934.png

    Figure 1. PF53 High Level Block Diagram

  2. Tolerance window
    With smaller processor nodes, the allowed window within which the power supply must regulate gets smaller. The tolerance window must be met during steady state (DC) as well as transient conditions (AC). While the steady state regulation is governed by accuracy of internal circuits such as bandgap reference and current sense accuracy, the transient tolerance is governed by the loop bandwidth and amount of output capacitance. It is important to select a DC-DC converter with low DC accuracy specifications as well as one that offers a high loop bandwidth.

    The PF53 family offers a +/-1% DC accuracy and bandwidth as high as 400kHz. In addition, it offers programmable load-line capability. Also known by other terms such as adaptive voltage positioning (AVP) and droop control, AVP lowers the output voltage at higher load currents. The benefit of this feature is increased margin for AC tolerance as showed in  Figure 2. Figure 3 shows the PF53 AVP performance. The user can choose the AVP for a given application based on the total tolerance window available.

    nxpadmin_1-1686330345496.png

    Figure 2. Benefit of AVP

    nxpadmin_2-1686330386811.png

    Figure 3. PF5300 AVP Characteristics


    Using AVP and the high bandwidth loop, the PF53 can regulate within a 3% tolerance window that includes DC and AC tolerances with just 150 uF of capacitance. Figure 5 shows the transient response of the PF53 with only 150 uF of capacitance. This complies with the requirements for a leading vision processor.

    nxpadmin_3-1686330426664.png

    Figure 4. Transient Response with and without AVP; Cout = 150 uF

  3. Efficiency
    Power not sent from the input to the output is dissipated as heat. Efficiency, thus, directly affects thermal performance of the system. As power levels increase, efficiency also must increase to maintain a reasonable power dissipation. Thick MOSFET metallization, packaging, high quality inductors, optimization of the switching times and dead time, MOSFET resistance and gate charge are all critical factors affecting efficiency. It is important for a power solution to incorporate these while offering a solution in the market.


    With advances is MOSFET and switching design, the PF53 provides high efficiency across load currents in a low thermal resistance package. Figure 5 shows efficiency of the PF53 for loads up to 15 A. Refer to the PF53 datasheet for more performance curves.

    nxpadmin_4-1686330512235.png

    Figure 5. PF53 efficiency at 3.3V input and 1.0 V output

     
  4. Power up timing flexibility
    The core supply is just one part of the system. It is important for it to fit in the system among other power management ICs. For this it needs to have interface pins that can be used to communicate bidirectionally with other components in the system.


    The PF53 features the XFAILB pin which is used in other PMICs from NXP. This single pin is used to co-ordinate power up and power down timing among different ICs in the system during normal as well as during fault operation. In addition, it has programming power up timing, power down timing and delay before power good (PGOOD) release which come in handy when designing a complex power management system.

     

Functional Safety Needs:

Power management ICs are responsible for managing and distributing power throughout the vehicle's electronic systems, including critical components such as airbags, anti-lock brakes, and electronic stability control and ADAS. In case of a malfunction, a faulty power management IC could potentially cause these systems to fail, which could have catastrophic consequences. To prevent such scenarios, power management ICs must be designed and evaluated to ensure they meet rigorous functional safety standards, such as ISO 26262, which specifies requirements for the functional safety of road vehicles.

The PF53 is designed per ISO 26262 to meet the stringent needs of an ASIL D system. The output voltage is monitored for over and undervoltage faults with programmable fault thresholds and fault reaction.

The monitoring functions in the IC are independent and provide a high level of diagnostic coverage. Not only are the monitors independent, but the analog core of the IC is also independently monitored for faults. The PGOOD output has 2 input buffers to ensure that the output is not ‘stuck-at’ the system level. The PF53 also integrates a window watchdog timer for monitoring the processor in the system. Complete documentation such as FTA, DFA, FMEDA, detailed Safety Manual are available for customers.

In summary, the PF53 offers a high efficiency, low bill of material (BOM) solution for demanding automotive applications. The functional safety architecture and features of the PF53 exceed the ASIL D levels as prescribed in the ISO 26262 with complete documentation. For more details, head to nxp.com/pf53.

 

For inquiries/questions open a thread conversation on the forum Power Management.