How do you get the GPIO ports PTB4 and PTB5 to work as full complimentary outputs? The datasheet does not indicate that these pins are open-drain only, but I can only get these to operate as open drain outputs. I had to add external pull-ups to PTB4 and PTB5 to get desired output functionality. The internal pull-ups were too weak for my application.
Just setting the PTBDD register only provides open-drain operation. I tried clocking the IIC module and enabling the module, with the same result. If I put the IIC module into the Master mode, I lose control of the I/O.
Thanks for the input on this problem.
Hi Ride,
The GW series contains an LCD controller, and that controller needs those ports to be open-drain. If I recall correctly, somewhere in the LCD controller there are bits to disable the open-drain and enable those ports as push-pull.
Hello,
To be more specific, the following is an excerpt from the reference manual for the GW device -
Pins that have shared function with the LCD have special behavior based on the state of the VSUPPLY
bits in the LCDSUPPLY register. These pins (PTD, PTE and PTA[5:4]) can operate as full complementary
drive or open drain drive depending on the VSUPPLY bits. When VLL3 is connected to VDD externally,
VSUPPLY = 11, FCDEN = 1, and RVEN = 0, the pins operate as full complementary drive. For all other
VSUPPLY modes, the LCD/GPIO will operate as open drain.
Regards,
Mac
Thanks for the replies. PTB3, PTB4 and PTB5 are not multiplexed with the LCD controller. I was able to get the GPIO pins multiplexed with the LCD module to work as full complimentary outputs per the reference manual. PTB3, PTB4 and PTB5 are designated in the reference manual as AMR dedicated pins that can interface to a 5V device using the SPI0 module . This interface diagram in the reference manual shows external pullups to 5V and open drain operation when the using the I/O in this way.
I can't find any definite reference in the manual that PTB3, PTB4 and PTB5 are "open drain only" when used as GPIO. When I designed the circuit I did not add external pullups as I beleived PTB3, PTB4 and PTB5 were GPIO with push/pull type outputs when used as GPIO. I am able to add external pullups to make the design work, but this forces me into a revision of the design. If I can get PTB3, PTB4 and PTB5 to function as push/pull GPIO connected to the I/O supply of 3.3V, the design need not be revised.
The MC9S08GW may not have the circuitry for push/pull outputs on these I/O pins and if it did I have yet, by trial and error, figured out the right register settings to get this operation.
Thanks for any additional help on this issue.
Hello,
As these pins need to provide compatibility with an external 5 volt input, in conjunction with an external pullup resistor, this arrangement would not be compatible with the presence of a P-channel transistor. This is because the intrinsic diode associated with the transistor would conduct (resulting in injection current), prior to reaching the 5 volt output level.
However, I cannot find any documentation that describes whether the presence of the transistor can be controlled. If this is possible, I might reasonably expect to find a mention within the GPIO chapter of the reference manual.
Perhaps you should submit a service request to have this matter clarified. Either way, the documentation would appear to be incomplete.
Regards,
Mac