MC9S08GB32ACFUE NEW MASKSET 4L11Y

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MC9S08GB32ACFUE NEW MASKSET 4L11Y

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neilporven
Senior Contributor I

Hi everyone,

I have the following processor MC9S08GB32ACFUE  ON22A   XNDA  and I found that there is a 

new maskset 4L11Y.  The reason I looked for an errata is that we are having some processors do

not switch to the external crystal or the external crystal shows no wave frequency when running.

Note 1 says:

1.When FLL is Engaged, ICG May Experience Locking Issues - SE107B-ICG_FLL ICG errata with FLL losing lock over certain ranges.

I don't know if this is the issue I am experiencing?

Can someone help?

Thanks,

Neil

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vicentegomez
NXP TechSupport
NXP TechSupport

Hi

The 0N22A is the mask set of the part that you are using, because of this the errata that is for the 4L11Y does not apply to this mask set.

maybe you are having different problems

Be aware that this device is not recommended for new designs 

regards

Vicente

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neilporven
Senior Contributor I

Hi Vicente,

I am having issues with the MC9S08GB32ACFUE processor.  It appears that when I power the board the external crystal doesn't start up.

This only happens on a few board of our boards during production, if we remove the processor on the board having the issue and replace

with a known good processor, the issue is resolved.

Do you know of anyone having this issue? Or Is there an errata for the ON22A mask set for this processor that you know of?

By the way, this is not a new design.

Thanks,

Neil

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vicentegomez
NXP TechSupport
NXP TechSupport

Hi

What happens if you put the "failed" MCU on a good board?

Maybe the problem is the crystal signal, you can check the capacitor if you have for the oscillator circuit.

I have no information about more problem with crystal on this device, and there is not errata sheet of this mask set.

Would be possible that you measure the crystal signal on a good board and on a failed board?

What happens if on a failed board with the failed device you reprogramming to use the internal clock, the unit works?

Regards

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neilporven
Senior Contributor I

Hi Vicente,

1.  We have swapped the crystal, loading capacitors, loading resistor, etc....  A bad board, will remain bad, unless a new working 

     uP is used.  Once we have the board working, then we remove the good uP and swap again the bad one to see if problem returns.

     The issue always comes back after swapping the good uP for the bad one.

2.  When we measure the crystal signal on a good board, we get a 9.83MHz as expected.  On a bad board, we get no signal at all.

3.  We have not reprogrammed the board to use the internal clock to see if the unit works.  But if it does work, this doesn't explain why

     the external crystal is not working and you can't really say that the uP is good at that point.

Is there a recommended layout of the crystal, capacitor, resistor documentation?

So far everything is pointing to something happening with the uP itself.  So NXP has no errata info for this uP, I am wondering if you or someone

in your department or other department ever opened a ticket with this type of failure?

Regards,

Neil

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vicentegomez
NXP TechSupport
NXP TechSupport

Hi you can check the following application note.

Crystal Oscillator Troubleshooting Guide

Also I do not know if you can share me the schematics and the capacitor data sheet in order to check them

Have a good day

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neilporven
Senior Contributor I

Hi Vincent,

It's been a long time since I started this thread, but the issue still persist.  I have done multiple test on the board and our company has sent you one of our boards for testing.  The last thing we had asked was to hit the processor with a little freeze spray and see that the external crystal shuts down, but the processor will switch to the internal clock.

On a good processors doing the same (spray a little freeze spray) does not cause the external crystal to shut down.

Some questions:

1. Did you ever tried doing this test (spray a little freeze spray on the processor) to see results?

2. Are there any errata on this processor since?

Thank you,

Neil

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