I recently discovered that for MC9S08QG8 and QG4 MCUs, the SOPT1 register needs to be written *after* you write SPMSC2 and clear the SPMSC2_PPDACK flag. Apparently, if SOPT1 is initialized first, the flag doesn't clear. The device initialization code produced by CW 5.1 isn't very helpful because it sets SOPT1 first, so it kind of gets you off on the wrong foot when writing the init routine for resuming from stop 2. And of course port I/O won't work until the PPD is ack'ed and I don't think the BDM can be used with STOP 2.
I know I'm resurrecting an old thread here, but it would have saved me a couple hours if I had known this to start with. :smileyhappy:
I also have the same problem... I have an RTC interrupt that wakes the MCU out of stop2 mode and this works with the debugger, but after powering the dev board off and then powering back on, the RTC interrupt no longer wakes up the MCU. I also tried flashing the target regularly instead of straight to debug mode with no luck.
Has anybody found a solution for this??
In STOP 2, the RTC interrupt will never fire. It will wake up the MCU and take the reset vector, but the RTI interrupt won't fire. The docs note this.
I think what you're seeing is the presence of the BDM. When the BDM is attached it will set ENBDM=1, which prevents the MCU from entering STOP 1 or STOP 2 modes, allowing only STOP 3. This is consistent with the stop mode selection table in the data sheet. (Table 3-1 for MC9S08QG8)
When you power the board off and back on, I'm guessing the BDM is no longer connected, therefore it can actually go to STOP 2 thus your interrupt doesn't fire.
marcom wrote:I have same identical problem.... internal osc, stop2 and wake up through RTI... nothing to do, sleeps sleeeps sleeeps, but in debugger mode it's ok.
CW 5.1 SE .... hints or news????
thanks
LED1=LED_ON;EnableInterrupts;SOPT_STOPE= 1; /*Enable stop modes*//* Real-Time Interrupt Enable Real-Time Interrupt Clock Select internal Real-Time prescale set to ~1 ms */SRTISC = 0x57; <-- write all config bits at the same time/* Enable deep sleep mode stop2. */SPMSC2_PPDC= 1; /* Partial Power Down Control */SPMSC2_PDC= 1; /* Power Down Control */
rhinoceroshead wrote:
It looks like the internal clock is selected by default, so maybe this isn't what's happening in your case. But I would still try writing the bits at the same time just in case something is out of order.