ISL79987 and adv7180 de-interlace driver for iMX8QXP boards

Document created by Qiang Li - Mpu Se Employee on Oct 30, 2019Last modified by Qiang Li - Mpu Se Employee on Nov 14, 2019
Version 2Show Document
  • View in full screen mode

adv7180 is the 8 bits parallel CSI interface TVin to iMX8QXP validation board.

Its weaving mode de-interlace can be supported on both iMX8QXP B0 and C0 chips, but blending mode de-interlace can only work on iMX8QXP C0 chips.

 

ISL79987 is the 4 virtual channel TVin chip which can input 4 CVBS cameras to iMX8QXP with MIPI CSI2 inteface, it can only work with iMX8QXP C0 chips. The iMX8QXP B0 chips have MIPI CSI2 virtual channel errata.

 

To test the capture to file:

$ /unit_tests/V4L2/mx8_v4l2_cap_drm.out -cam 1 -num 300 -fmt YUYV -of

 

To test the preview on screen:

$ killall weston

$ /unit_tests/V4L2/mx8_v4l2_cap_drm.out -cam 1 -fmt RGBP -num 30000

 

Note:

1. For weaving mode de-interlace, when the ISI is doing de-interlace, it can't do CSC at the same time, so preview will get color issue, because the real output video is always YUYV format.

2. For blending mode de-interlace, it must use ISI0, so for ISL79987, only one camera can use blending mode, the other three cameras are still using weaving mode. The preview color is OK for such use case.

3. The patch is for L4.19.35 BSP.

 

 

2019-11-14 update:

Add the test application "mx8_v4l2_cap_drm.tar.gz" to support YUYV render to display.

Test command to render 4 weaving mode cameras:

   ./mx8_v4l2_cap_drm.out -cam 0xF -fmt YUYV -num 30000

Outcomes