LPC11U6x/E6x uDMA -> HS GPIO = DMA error. NXP, please give a yes/no answer.

[jonnevalola]

Hello all

I've searched all information for the answer to this one (including previous questions here by Paolo Bernasconi).

If I try to write with DMA from SRAM to a GPIO register (byte, word, pin, set etc), I get a DMA error. The exact same code works perfectly in memory-to-memory transfers.

As Paolo pointed out, Figure 3 of the AHB multilayer matrix on page 14 of the UM10732 user manual for LPC11U6x/E6x indicates, that HSGPIO is connected to the DMA. However, in practice, I can't get it to work.

Now, can we please get an expert from NXP side to clarify this once and for all. If anyone from NXP is reading this, and does not know the answer, please consult your colleagues before answering.

1) Can we use DMA to drive GPIO on the LPC11U6x/LPC11E6x? Yes/No

2) If yes, how is it done? Don't just say it "should be possible", if you can't explain/have no practical experience of how it is done.

3) If no, is this a general limitation imposed by the Cortex-M0+ bus/uDMA design, or a limitation in this NXP chip family? (bonus question for extra points)

WBR,

J

[amish_desai · Accepted solution]

Hi Jonne,

Apologize for the delay response. We have been looking into the design and have confirmed that the LPC11U6x/LPC11E6x's DMA doesn't support GPIOs. We will correct the figure in the user manual.

This is a limitation in our architecture since the GPIO interface are tied directly to the IOP interface.  

Thanks.

Amish

[jonnevalola]

Hello Amish

Thank you for the answer and taking the time to research it.

WBR

Jonne