Accessing CCSR from linux user space

[ramakrishnakatt]

Hi,

We are working on P5040 and T1040. For our Diag application purpose we have to access CCSR from user space. that is mandatory one. i have write one application using mmap and /dev/mem to access DDR, SVR and GVR . But iam getting 0xdeadbeef. I have used both mmap and mmap64 same output. That is must for our application. This is mandatory requirement.

I am attaching source code file.

Original Attachment has been moved to: linux_dump.c.zip

Original Attachment has been moved to: regrw.c.zip

[udaishar]

Thanks for the solution. It is working fine for us.

But can we apply the similar scheme for p2020 as well. I seem to be getting bus error whenever I try to access the mmap'ed address space.

Dts:

soc@ff700000 {
        #address-cells = <1>;
        #size-cells = <1>;
        device_type = "soc";
        compatible = "simple-bus";
        ranges = <0x0 0 0xff700000 0x100000>;
        reg = <0 0xff700000 0 0x1000>; 
        bus-frequency = <0>;

        memory-controller@2000 {
            compatible = "fsl,p2020-memory-controller";
            reg = <0x2000 0x1000>;
            interrupt-parent = <&mpic>;
            interrupts = <18 2>;
        };

[scottwood]

Have you double checked (e.g. using strace, or at least inspecting the value after all math before passing it to mmap) that you're mapping the address you thought you were?

For example, in linux_dump.c it looks like you'll truncate the address to 32 bits due to MAP_MASK being of type "int".

Also make sure that your program is built in a way that gives it access to large file support -- you may need to define _LARGEFILE_SOURCE or similar.

[Pavel]

It is not good practice directly accessing to registers in Linux. Linux kernel provides memory address translation using MMU of the P5040.

Use required device driver.

Freescale offers SDK 1.5 for QorIQ processors. See please the following page (http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=SDKLINUX&fsrch=1).

This page contains link for 32-bit and 64-bit images for e5500 core. These images contain the P5040 image. 

Look at the .dts file for the P5040ds board. This file shows that CCSR value is 0xFFE00000 in the SDK for the P5040.

Use log of usdpaa package for mmap using. See the attached log of building of the usdpaa package.

After install SDK, create a project for P5020DS 64bit.

source ./fsl-setup-poky -m p5020ds-64b

extract USDPAA source

bitbake usdpaa -c patch -f

Get the source in build_p5020ds-64b_release/tmp/work/ppc64e5500-fsl-linux/usdpaa-git-r11/git/.

Build usdpaa package

Bitbake usdpaa -c compile -f

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[vakulgarg]

To read CCSR address, I use attached program.

On T1040, CCSR is located at: 0xffe000000

Sample program run on B4860.

root@b4860qds:~# ./ccsr_read

./ccsr_read <ccsrbar> <offset> <len]

root@b4860qds:~# ./ccsr_read 0xffe000000 0 32

CCSRBAR=0xffe000000 mapped at: 0xf6916000, offset = 0

ffe000000: 0000000f fe000000 00000000 00000000

ffe000010: 00000000 00000000 00000000 00000000

ffe000020: 00000000 7ffff000 8110000b 00000000