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Debugging BSCAN test for Vybrid. Chip doesn't seem to respond correctly with this BSDL file

Question asked by ericschumann on Jul 12, 2013
Latest reply on Sep 4, 2013 by Ross Mcluckie

Hello,

I made a boundaryscan project for our Vybrid module with the "Cascon" tools from Göpel electronic.

The "infrastructure" test, which reads the Vybrid ID and checks the JTAG scanchain works fine.

But every other test I try fails, because none of the Vybrid pins seems to be driveable. The BSDL file contains no compliance pattern which means that there are no conditions which have to met to enable boundaryscan. The Vybrid CPU has two "test" pins (#T3 and #T1). Maybe I have to use these pins in some way (they are tied to GND)? There is no information about that in the datasheets.

Here are some information about the environment I use:

- Cascon 4.6.2b

- BSDL File VYBRID_364_F.bsdl Version 5

- Vybrid CPU marking "PVF65GS10CMK40 TEST REV B1" ( also tried step C3 )

 

Any help to get the boundaryscan test running is welcome :-)

 

Regards

Eric


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