VF61/Vybrid, is this semaphore function

soichiyamamoto · ‎09-05-2013

Hi,

I have a question about A3.4 Synchronization and semaphores(A3-12)/ DDI0406BJ_arm_architecture_reference_manual.

In the multi-core (A5+M4) of Vybrid, is this semaphore function usable?

And is exclusive control possible between multi-core(A5+M4) ?

Best Regards,

soichi yamamoto

ed_nash · ‎09-05-2013

Hi-

Yes, there are hardware semaphores that can be (are intended to be) used between the M4 and A5.

In the case of MQX on both the A5 and M4 or Linux on the A5 and MQX on the M4, there are demos available in the Timesys BSP.

The MCC (multicore communication system) between MQX on both or Linux / MQX also uses them to protect shared memory.

One nice feature is that if access is denied, you can program the semaphore to issue an interrupt when it is freed.

I hope this helps.

Ed

ed_nash · ‎09-05-2013

Hi-

Yes, there are hardware semaphores that can be (are intended to be) used between the M4 and A5.

In the case of MQX on both the A5 and M4 or Linux on the A5 and MQX on the M4, there are demos available in the Timesys BSP.

The MCC (multicore communication system) between MQX on both or Linux / MQX also uses them to protect shared memory.

One nice feature is that if access is denied, you can program the semaphore to issue an interrupt when it is freed.

I hope this helps.

Ed