Hello there,
I'd like to have some information about the way LCDIFv2 acts as a bus master on the 1176 memory.
In particular, I'd like to know if there's any way to configure the LCDIFv2 bus access priority and mode of operation (burst, round robin, etc).
The reason for this question is that I'm facing some issues on a multicore project I'm working on, where I'm using CM4 to drive SAI with DMA, and CM7 to drive a MIPI DSI display using LCDIFv2 and PXP; in this application, the CM4 SAI TX DMA channel stops working after a few seconds of runtime, and if I disable the CM7 display code the issue seems to disappear.
Hi @MickMad,
The LCDIFv2 does not have any priority or mode of operation mechanisms unfortunately. The best resource I can provide to you about how it works is the following application note: AN12940: Use Case of RT1170 LCD Display System based on MIPI DSI – Application Note
BR,
Edwin.
Hi @EdwinHz ,
let me rephrase then; in my application I'm using SAI TX/RX with DMA, USB and LCDIFv2 driving a display with resolution 1280*720*16bpp. Can you tell me how is bus arbitration handled in such an application, given that I can only configure the SAI DMA, while USB and LCDIFv2 are both not configurable?
Hi @MickMad,
As you can see from Section "2.1.2 System Bus Diagram" of the RT1170 Reference Manual, LCDIFv2 is located on a completely different bus than the USB, DMA and SAI modules. Therefore, it should not be a bus arbitration issue.
Why do you mention that the LCDIFv2 cannot be configured alongside USB or SAI? What error do you see? How are you doing the initialization of each of these modules?
BR,
Edwin.