Trigger ADC_ETC by QTMR with RT1060

[kurt_staubli]

I implemented a 4 motor BLDC controller with NXP's RT1062 CPU. It works fine. Please consult the included diagram for details of the solution.

Now I have received requirements for a new controller:

1. I have to replace TRIGGER_PWM by something else, because all 4 PWMs are used to drive outputs
2. Instead of 4 staggered time intervals, 6 are required, so TRIGGER_5 and TRIGGER_6 are new

My questions:

1. I tried to replace TRIGGER_PWM by a quad timer (QTMR). I implemented 4 triggers which produce 4 staggered time intervals. The output of the 4 triggers is also led by XBAR to the PWMs and ADC_ETC. It does not work. I am not sure how to configure "Timer Channel Control Register/OUTMODE". What kind of event does ADC_ETC expect when triggered by XBAR?
2. Is it possible to configure ADC_ETC in a way that it receives 6 triggers and invokes with each trigger two synchronous ADC conversions?

[kurt_staubli · Accepted solution]

As mentioned above, I was not able to trigger ADC_ETC by QTMR. I found another solution (I use again PWM to trigger ADC_ETC) and would not investigate more in the QTMR problem.

[kurt_staubli]

Hi

Thank you for the answer. I tried your solution, but it did not work. My interpretation of kQTMR_SetOnCompare is this: OFLAG will be set as soon as the first successful compare is done. OFLAG will not be reset. But ADC_ETC expects repetitive triggers.

In the example solution (PMSMRT1050B), ADC_ETC receives triggers from a PWM module via XBAR. My old solution works similar. Now, I would like QTMR as a source of triggers for ADC_ETC. I am afraid that I do not understand how triggers are generated by QTMR in a manner that they can be received by ADC_ETC. I tried different output modes (TMR_CTRL_OUTMODE).

Best regards

[_Leo_]

Hi,

Thank you so much for your interest in our products and for using our community.

As such I did not find an example of ADC_ETC triggered by QTMR. However, in the "evkbimxrt1050_mc_pmsm" example, the PWM_OUT_TRIG0 will be set when the counter value matches the VAL4 value (PMSMRT1050B), so I recommend starting by setting the Timer Channel Control Register/OUTMODE to 010b - Set OFLAG output on successful compare.

Regarding your second question, the ADC_ETC has 8 external triggers input from XBAR. Also supports SyncMode. In this mode, ADC1 and ADC2 are controlled by the same trigger source of ADC_ETC.

Hope it helps you.

Have a nice day!