Issue with creating bootable image for RT1050

[bzhang3]

Hello All,

I'm using Keil IDE to build code to execute from the hyperflash on the RT1050 EVKB. When I load the code onto flash and run in the Keil debugger, everything works fine. And when I close the debugger and power cycle the board, code still executes successfully from flash.

Now I'm trying to build a bootable image and use the MFGTool to load code onto the H-flash. I'm running into issues. Here's steps I followed:

1. Creating a s-record file with the .axf generated by Keil (test.axf and test.srec attached):

      "fromelf --m32combined --output=test.srec test.axf"

2. Creating binary file with elftosb:

      "elftosb.exe -f imx -V -c imx-flexspinor-normal-unsigned.bd -o test.bin test.srec"

The output test.bin only has 0 bytes. However if I use the led demo in the example images of the FlashLoader, I can generate a .bin file successfully. 

Can anybody help me figure out what the problem is? Many thanks in advance. 

Regards,

Bin

[jay_heng]

You can also try this tool, with this tool, You can flash bare image into various boot devices easily and don't need to care about headers (ivt, boot data...)

GitHub - JayHeng/nxp-sec-boot-ui: A one-stop GUI tool to work with NXP MCU (Kinetis, i.MXRT, LPC) RO... 

[bzhang3]

The original example Led .srec and generated .srec is also attached. 

Thanks,

Bin

[melissa_hunter]

Hi Bin,

Looking at the SREC I'm pretty sure that your application already includes the FCB and IVT for the flash. The process you are going through with elftosb and the MfgTool will add these, so when using this method (instead of programming from the debugger directly) you want to start with an image that doesn't include the FCB and IVT.

There are two defines in the SDK projects you can use to control if the FCB and IVT are included or not. By default you should have these preprocessor defines in the project to include the FCB and IVT:

XIP_BOOT_HEADER_ENABLE=1
XIP_BOOT_HEADER_DCD_ENABLE=1

If you want to remove the FCB and IVT, then change these defines both to 0 instead of 1. 

Hope this helps,

Melissa

[1920844004]

I have the same problem. How did you solve it?

[melissa_hunter]

HI Zhihui,

In addition to the changes to the preprocessor defines I listed above the scatter file also needs to be modified to take out the sections where that data was supposed to go. If you comment out lines 57-61:

//#define m_flash_config_start 0x60000000
//#define m_flash_config_size 0x00001000

//#define m_ivt_start 0x60001000
//#define m_ivt_size 0x00001000

and 88-100:

/*LR_m_rom_config m_flash_config_start m_flash_config_size { ; load region size_region
RW_m_config_text m_flash_config_start m_flash_config_size { ; load address = execution address
* (.boot_hdr.conf, +FIRST)
}
}

LR_m_rom_ivt m_ivt_start m_ivt_size { ; load region size_region
RW_m_ivt_text m_ivt_start m_ivt_size { ; load address = execution address
* (.boot_hdr.ivt, +FIRST)
* (.boot_hdr.boot_data)
* (.boot_hdr.dcd_data)
}
}*/

Then the project will compile. I didn't go through the whole process, but the map file output looks correct. Now if you generate the srec and start using elftosb it should work.

Regards,

Melissa

[1920844004]

thanks! now ,its OK.

[bzhang3]

Hi Melissa,

Thanks for your reply. That makes a lot of sense. However after I change the #defines to 0, I'm getting linker errors:

"linking...
MIMXRT1052xxxxx_flexspi_nor.scf(90): error: L6236E: No section matches selector - no section to be FIRST/LAST.
MIMXRT1052xxxxx_flexspi_nor.scf(96): error: L6236E: No section matches selector - no section to be FIRST/LAST.
Not enough information to list image symbols.
Not enough information to list load addresses in the image map.
Finished: 2 information, 0 warning and 2 error messages.
"flexspi_nor_debug\freertos_lpuart.out" - 2 Error(s), 1 Warning(s)."

[igorpadykov]

Hi Bin

one can try to generate srec file with srec_cat utility :

srec_cat.exe #H -Intel -o $H@P.srec -Motorola

GENERAL: CREATING MOTOROLA S-RECORD FILES 

Best regards
igor

[igorpadykov]

Hi Bin

issue may be related to generated test.srec file, as it has not header section

(S0), opposite to examples provided in FlashLoader package

Programmers
Flashloader i.MX-RT1050

i.MX RT1050 MCU/Applications Crossover Processor | Arm® Cortex®-M7 @600 MHz, 512KB SRAM |NXP 

SREC (file format) - Wikipedia 

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[bzhang3]

Hi Igor,

Thanks for your reply. Yes, I noticed that too. But the .srec is generated from "fromelf --m32combined --output=test.srec test.axf". Am I missing an option when calling FromELF?

Also I tried the same with the example led_demo_evk_flexspi_nor_0x60002000.elf:

"fromelf --m32combined --output=led_demo_evk_flexspi_nor_0x60002000.srec led_demo_evk_flexspi_nor_0x60002000.elf"

The result .srec is also missing the S0 section. But using this file I had no problem calling the elftosb. The binary file was generated successfully. 

"D:\Work\Tools\Flashloader_RT1050_1.1\Tools\elftosb\win>elftosb.exe -f imx -V -c imx-flexspinor-normal-unsigned.bd -o test.bin "led_demo_evk_flexspi_nor_0x60002000 - generated.srec"
Section: 0x0
iMX bootable image generated successfully

D:\Work\Tools\Flashloader_RT1050_1.1\Tools\elftosb\win>"