When using the ipwrite command to send data to HyperRam we find a multiple microsecond delay between the DUMMY_RWDS_DDR command and the WRITE_DDR command. The delay only happens between CA and the first burst of data. Is there an explanation for that delay? Or some way to shorten it?
Do you see the same issue when using AHB write?
I do not. There is no delay between the DUMMY_RWDS command and the WRITE_DDR command in an AHB write.
I do see a 15us delay between ahb write bursts that I assume is either the AHB_TX_BUF or the TX_FIFO reloading. It is difficult to ascertain what is going on between those two data sources.