Hi,
Some time ago I managed to create flash loader for LPC-Link2 debug probe. It was created using Open Flash Loader Standard and it was used to download the code into the external memory (Infineon hyperflash S26HL512T) on a custom board with dual core IMXRT1176 MCU on it.
Recently I wanted to check out Segger's Jlink debugger, but I knew from the start, that it behaves differently than LPC-Link2 probe.
Generally I found out that it can handle 2 flash loaders:
1.) Open flash loader which has to be created according to some predefined rules in terms of memory sections in the flahs loader image.
2.) Segger Flash Loader which is supposedly much faster algorithm, but it requires from me to buy a dedicated tool for that, J-Link Device Support Kit.
Now, I know that I could probably use the existing flash loader I have, but it requires some modifications.
First of all, according to the Segger's wikipedia page, There MUST exist some particular memory sections within the flash loader image that is used.
The sections layout is shown on the picture below:
And here comes the problem, I know that embedded studio IDE manages its linker files in some unique way, meaning the use something like palcement.xml file that enforces some memory sections, like on the image below:
I have my own linker script as you can see below, but I have problems with creating the required section layout.
LLinkerscript:
/*
* Copyright 2022 NXP
* SPDX-License-Identifier: BSD-3-Clause
*
* Linker script for NXP LPC546xx SPIFI Flash Driver (Messaged)
*/
__stack_size = 128; /* stack size */
__cache_size = (16 * 1024); /* flash image buffer size */
MEMORY
{
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = (64 * 1024) - 32
}
__top_SRAM = 0x20000000 + (64 * 1024) - 32;
GROUP(libcr_semihost.a libcr_c.a libcr_eabihelpers.a)
SEARCH_DIR(..)
ENTRY(ResetISR)
SECTIONS
{
/* Marks the start of the SFL. Must be the very first section */
PrgCode : ALIGN(4)
{
KEEP(*(PrgCode))
} > SRAM
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
KEEP(*(.isr_vector))
/* Global Section Table */
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data)) ;
LONG( SIZEOF(.data));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
*(.text*)
*(.rodata .rodata.*)
. = ALIGN(4);
} > SRAM
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > SRAM
__exidx_start = .;
.ARM.exidx : ALIGN(4)
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > SRAM
__exidx_end = .;
_etext = .;
/* PrgData section */
PrgData : ALIGN(4)
{
KEEP(*(PrgData))
*(PrgData)
} > SRAM
/* MAIN DATA SECTION */
.uninit_RESERVED : ALIGN(4)
{
KEEP(*(.bss.$RESERVED*))
} > SRAM
.data : ALIGN(4)
{
FILL(0xff)
_data = .;
*(vtable)
*(.data*)
. = ALIGN(4) ;
_edata = .;
} > SRAM
/* MAIN BSS SECTION */
.bss : ALIGN(4)
{
_bss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(end = .);
} > SRAM
/* DevDscr section */
DevDscr : ALIGN(4)
{
KEEP(*(DevDscr))
*(DevDscr)
} > SRAM
PROVIDE(_pvHeapStart = .);
PROVIDE(_vStackTop = __top_SRAM - 0);
}When I analize the output file I get the following section header tables:
My question is as follows.
How can I make sure that the linker script used by MCUXpresso places the sections as defined above in the memory map of the output image?
